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https://github.com/c64scene-ar/llvm-6502.git
synced 2025-07-25 13:24:46 +00:00
add a bunch of mod/rm encoding types for fixed mod/rm bytes.
This will work better for the disassembler for modeling things like lfence/monitor/vmcall etc. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95960 91177308-0d34-0410-b5e6-96231b3b80d8
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@@ -858,6 +858,27 @@ void Emitter<CodeEmitter>::emitInstruction(const MachineInstr &MI,
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getX86RegNum(MI.getOperand(CurOp).getReg()));
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++CurOp;
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break;
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case X86II::MRM_C1:
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MCE.emitByte(BaseOpcode);
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MCE.emitByte(0xC1);
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break;
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case X86II::MRM_C8:
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MCE.emitByte(BaseOpcode);
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MCE.emitByte(0xC8);
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break;
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case X86II::MRM_C9:
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MCE.emitByte(BaseOpcode);
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MCE.emitByte(0xC9);
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break;
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case X86II::MRM_E8:
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MCE.emitByte(BaseOpcode);
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MCE.emitByte(0xE8);
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break;
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case X86II::MRM_F0:
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MCE.emitByte(BaseOpcode);
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MCE.emitByte(0xF0);
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break;
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}
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if (!Desc->isVariadic() && CurOp != NumOps) {
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@@ -29,6 +29,11 @@ def MRM0m : Format<24>; def MRM1m : Format<25>; def MRM2m : Format<26>;
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def MRM3m : Format<27>; def MRM4m : Format<28>; def MRM5m : Format<29>;
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def MRM6m : Format<30>; def MRM7m : Format<31>;
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def MRMInitReg : Format<32>;
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def MRM_C1 : Format<33>;
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def MRM_C8 : Format<34>;
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def MRM_C9 : Format<35>;
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def MRM_E8 : Format<36>;
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def MRM_F0 : Format<37>;
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// ImmType - This specifies the immediate type used by an instruction. This is
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@@ -3556,6 +3556,14 @@ static unsigned GetInstSizeWithDesc(const MachineInstr &MI,
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}
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}
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break;
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case X86II::MRM_C1:
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case X86II::MRM_C8:
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case X86II::MRM_C9:
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case X86II::MRM_E8:
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case X86II::MRM_F0:
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FinalSize += 2;
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break;
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}
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case X86II::MRMInitReg:
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@@ -268,6 +268,13 @@ namespace X86II {
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// MRMInitReg - This form is used for instructions whose source and
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// destinations are the same register.
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MRMInitReg = 32,
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//// MRM_C1 - A mod/rm byte of exactly 0xC1.
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MRM_C1 = 33,
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MRM_C8 = 34,
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MRM_C9 = 35,
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MRM_E8 = 36,
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MRM_F0 = 37,
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FormMask = 63,
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@@ -560,6 +560,26 @@ EncodeInstruction(const MCInst &MI, raw_ostream &OS,
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CurByte, OS, Fixups);
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CurOp += X86AddrNumOperands;
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break;
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case X86II::MRM_C1:
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EmitByte(BaseOpcode, CurByte, OS);
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EmitByte(0xC1, CurByte, OS);
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break;
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case X86II::MRM_C8:
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EmitByte(BaseOpcode, CurByte, OS);
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EmitByte(0xC8, CurByte, OS);
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break;
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case X86II::MRM_C9:
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EmitByte(BaseOpcode, CurByte, OS);
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EmitByte(0xC9, CurByte, OS);
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break;
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case X86II::MRM_E8:
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EmitByte(BaseOpcode, CurByte, OS);
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EmitByte(0xE8, CurByte, OS);
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break;
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case X86II::MRM_F0:
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EmitByte(BaseOpcode, CurByte, OS);
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EmitByte(0xF0, CurByte, OS);
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break;
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}
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// If there is a remaining operand, it must be a trailing immediate. Emit it
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