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Compute feature bits at time of MCSubtargetInfo initialization.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134606 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Evan Cheng
2011-07-07 07:07:08 +00:00
parent cbd40f8357
commit 0ddff1b535
33 changed files with 159 additions and 108 deletions
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29
include/llvm/MC/MCSubtargetInfo.h
View File

@@ -34,30 +34,29 @@ class MCSubtargetInfo {
const unsigned *ForwardingPathes; // Forwarding pathes
unsigned NumFeatures; // Number of processor features
unsigned NumProcs; // Number of processors
unsigned FeatureBits; // Feature bits for current CPU
public:
void InitMCSubtargetInfo(const SubtargetFeatureKV *PF,
void InitMCSubtargetInfo(StringRef CPU, StringRef FS,
const SubtargetFeatureKV *PF,
const SubtargetFeatureKV *PD,
const SubtargetInfoKV *PI, const InstrStage *IS,
const unsigned *OC, const unsigned *FP,
unsigned NF, unsigned NP) {
ProcFeatures = PF;
ProcDesc = PD;
ProcItins = PI;
Stages = IS;
OperandCycles = OC;
ForwardingPathes = FP;
NumFeatures = NF;
NumProcs = NP;
unsigned NF, unsigned NP);
/// getFeatureBits - Get the feature bits.
///
uint64_t getFeatureBits() const {
return FeatureBits;
}
/// ReInitMCSubtargetInfo - Change CPU (and optionally supplemented with
/// feature string), recompute and return feature bits.
uint64_t ReInitMCSubtargetInfo(StringRef CPU, StringRef FS);
/// getInstrItineraryForCPU - Get scheduling itinerary of a CPU.
///
InstrItineraryData getInstrItineraryForCPU(StringRef CPU) const;
/// getFeatureBits - Get the feature bits for a CPU (optionally supplemented
/// with feature string).
uint64_t getFeatureBits(StringRef CPU, StringRef FS) const;
};
} // End llvm namespace

19
include/llvm/Target/TargetRegistry.h
View File

@@ -70,7 +70,9 @@ namespace llvm {
StringRef TT);
typedef MCInstrInfo *(*MCInstrInfoCtorFnTy)(void);
typedef MCRegisterInfo *(*MCRegInfoCtorFnTy)(void);
typedef MCSubtargetInfo *(*MCSubtargetInfoCtorFnTy)(void);
typedef MCSubtargetInfo *(*MCSubtargetInfoCtorFnTy)(StringRef TT,
StringRef CPU,
StringRef Features);
typedef TargetMachine *(*TargetMachineCtorTy)(const Target &T,
const std::string &TT,
const std::string &CPU,
@@ -269,10 +271,18 @@ namespace llvm {
/// createMCSubtargetInfo - Create a MCSubtargetInfo implementation.
///
MCSubtargetInfo *createMCSubtargetInfo() const {
/// \arg Triple - This argument is used to determine the target machine
/// feature set; it should always be provided. Generally this should be
/// either the target triple from the module, or the target triple of the
/// host if that does not exist.
/// \arg CPU - This specifies the name of the target CPU.
/// \arg Features - This specifies the string representation of the
/// additional target features.
MCSubtargetInfo *createMCSubtargetInfo(StringRef Triple, StringRef CPU,
StringRef Features) const {
if (!MCSubtargetInfoCtorFn)
return 0;
return MCSubtargetInfoCtorFn();
return MCSubtargetInfoCtorFn(Triple, CPU, Features);
}
/// createTargetMachine - Create a target specific machine implementation
@@ -824,7 +834,8 @@ namespace llvm {
TargetRegistry::RegisterMCSubtargetInfo(T, &Allocator);
}
private:
static MCSubtargetInfo *Allocator() {
static MCSubtargetInfo *Allocator(StringRef TT, StringRef CPU,
StringRef FS) {
return new MCSubtargetInfoImpl();
}
};