From 0df7f51365f582afd755a832ea23a0b720f615b7 Mon Sep 17 00:00:00 2001
From: Ahmed Bougacha <ahmed.bougacha@gmail.com>
Date: Sun, 17 Nov 2013 21:24:37 +0000
Subject: [PATCH] Docs: Clearly separate Operand-related paragraphs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194977 91177308-0d34-0410-b5e6-96231b3b80d8
---
docs/WritingAnLLVMBackend.rst | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/docs/WritingAnLLVMBackend.rst b/docs/WritingAnLLVMBackend.rst
index 0d29210f9ac..5dd55d08adc 100644
--- a/docs/WritingAnLLVMBackend.rst
+++ b/docs/WritingAnLLVMBackend.rst
@@ -911,6 +911,9 @@ format instructions will bind the operands to the ``rd``, ``rs1``, and ``rs2``
fields. This results in the ``XNORrr`` instruction binding ``$dst``, ``$b``,
and ``$c`` operands to the ``rd``, ``rs1``, and ``rs2`` fields respectively.
+Instruction Operand Name Mapping
+^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
+
TableGen will also generate a function called getNamedOperandIdx() which
can be used to look up an operand's index in a MachineInstr based on its
TableGen name. Setting the UseNamedOperandTable bit in an instruction's
@@ -952,6 +955,9 @@ XXXInstrInfo.h:
int16_t getNamedOperandIdx(uint16_t Opcode, uint16_t NamedIndex);
} // End namespace XXX
+Instruction Scheduling
+----------------------
+
Instruction itineraries can be queried using MCDesc::getSchedClass(). The
value can be named by an enumemation in llvm::XXX::Sched namespace generated
by TableGen in XXXGenInstrInfo.inc. The name of the schedule classes are