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CellSPU testcase, extract_elt.ll: extract vector element.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45219 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Scott Michel
2007-12-19 21:17:42 +00:00
parent f0c3354d99
commit 0e5665bf03
2 changed files with 180 additions and 2 deletions
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7
lib/Target/CellSPU/SPUISelLowering.cpp
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@@ -2101,7 +2101,7 @@ static SDOperand LowerEXTRACT_VECTOR_ELT(SDOperand Op, SelectionDAG &DAG) {
}
// Need to generate shuffle mask and extract:
int prefslot_begin, prefslot_end;
int prefslot_begin = -1, prefslot_end = -1;
int elt_byte = EltNo * MVT::getSizeInBits(VT) / 8;
switch (VT) {
@@ -2123,6 +2123,9 @@ static SDOperand LowerEXTRACT_VECTOR_ELT(SDOperand Op, SelectionDAG &DAG) {
}
}
assert(prefslot_begin != -1 && prefslot_end != -1 &&
"LowerEXTRACT_VECTOR_ELT: preferred slots uninitialized");
for (int i = 0; i < 16; ++i) {
// zero fill uppper part of preferred slot, don't care about the
// other slots:
@@ -2134,7 +2137,7 @@ static SDOperand LowerEXTRACT_VECTOR_ELT(SDOperand Op, SelectionDAG &DAG) {
? 0x80
: elt_byte + (i - prefslot_begin));
ShufMask[i] = DAG.getConstant(mask_val, MVT::i16);
ShufMask[i] = DAG.getConstant(mask_val, MVT::i8);
} else
ShufMask[i] = ShufMask[i % (prefslot_end + 1)];
}