Move LiveUnionArray into LiveIntervalUnion.h

It is useful outside RegAllocBase.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158041 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jakob Stoklund Olesen 2012-06-05 23:57:30 +00:00
parent 2fd0923593
commit 0e5a60b4eb
4 changed files with 54 additions and 47 deletions

View File

@ -208,3 +208,26 @@ bool LiveIntervalUnion::Query::checkLoopInterference(MachineLoopRange *Loop) {
VRI = VirtReg->advanceTo(VRI, Overlaps.start());
}
}
void LiveIntervalUnion::Array::init(LiveIntervalUnion::Allocator &Alloc,
unsigned NSize) {
// Reuse existing allocation.
if (NSize == Size)
return;
clear();
Size = NSize;
LIUs = static_cast<LiveIntervalUnion*>(
malloc(sizeof(LiveIntervalUnion)*NSize));
for (unsigned i = 0; i != Size; ++i)
new(LIUs + i) LiveIntervalUnion(Alloc);
}
void LiveIntervalUnion::Array::clear() {
if (!LIUs)
return;
for (unsigned i = 0; i != Size; ++i)
LIUs[i].~LiveIntervalUnion();
free(LIUs);
Size = 0;
LIUs = 0;
}

View File

@ -181,6 +181,28 @@ public:
Query(const Query&); // DO NOT IMPLEMENT
void operator=(const Query&); // DO NOT IMPLEMENT
};
// Array of LiveIntervalUnions.
class Array {
unsigned Size;
LiveIntervalUnion *LIUs;
public:
Array() : Size(0), LIUs(0) {}
~Array() { clear(); }
// Initialize the array to have Size entries.
// Reuse an existing allocation if the size matches.
void init(LiveIntervalUnion::Allocator&, unsigned Size);
unsigned size() const { return Size; }
void clear();
LiveIntervalUnion& operator[](unsigned idx) {
assert(idx < Size && "idx out of bounds");
return LIUs[idx];
}
};
};
} // end namespace llvm

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@ -52,10 +52,11 @@ bool RegAllocBase::VerifyEnabled = false;
void RegAllocBase::verify() {
LiveVirtRegBitSet VisitedVRegs;
OwningArrayPtr<LiveVirtRegBitSet>
unionVRegs(new LiveVirtRegBitSet[PhysReg2LiveUnion.numRegs()]);
unionVRegs(new LiveVirtRegBitSet[TRI->getNumRegs()]);
// Verify disjoint unions.
for (unsigned PhysReg = 0; PhysReg < PhysReg2LiveUnion.numRegs(); ++PhysReg) {
for (unsigned PhysReg = 0, NumRegs = TRI->getNumRegs(); PhysReg != NumRegs;
++PhysReg) {
DEBUG(PhysReg2LiveUnion[PhysReg].print(dbgs(), TRI));
LiveVirtRegBitSet &VRegs = unionVRegs[PhysReg];
PhysReg2LiveUnion[PhysReg].verify(VRegs);
@ -89,16 +90,6 @@ void RegAllocBase::verify() {
// RegAllocBase Implementation
//===----------------------------------------------------------------------===//
// Instantiate a LiveIntervalUnion for each physical register.
void RegAllocBase::LiveUnionArray::init(LiveIntervalUnion::Allocator &allocator,
unsigned NRegs) {
NumRegs = NRegs;
Array =
static_cast<LiveIntervalUnion*>(malloc(sizeof(LiveIntervalUnion)*NRegs));
for (unsigned r = 0; r != NRegs; ++r)
new(Array + r) LiveIntervalUnion(allocator);
}
void RegAllocBase::init(VirtRegMap &vrm, LiveIntervals &lis) {
NamedRegionTimer T("Initialize", TimerGroupName, TimePassesIsEnabled);
TRI = &vrm.getTargetRegInfo();
@ -109,25 +100,15 @@ void RegAllocBase::init(VirtRegMap &vrm, LiveIntervals &lis) {
RegClassInfo.runOnMachineFunction(vrm.getMachineFunction());
const unsigned NumRegs = TRI->getNumRegs();
if (NumRegs != PhysReg2LiveUnion.numRegs()) {
if (NumRegs != PhysReg2LiveUnion.size()) {
PhysReg2LiveUnion.init(UnionAllocator, NumRegs);
// Cache an interferece query for each physical reg
Queries.reset(new LiveIntervalUnion::Query[PhysReg2LiveUnion.numRegs()]);
Queries.reset(new LiveIntervalUnion::Query[NumRegs]);
}
}
void RegAllocBase::LiveUnionArray::clear() {
if (!Array)
return;
for (unsigned r = 0; r != NumRegs; ++r)
Array[r].~LiveIntervalUnion();
free(Array);
NumRegs = 0;
Array = 0;
}
void RegAllocBase::releaseMemory() {
for (unsigned r = 0, e = PhysReg2LiveUnion.numRegs(); r != e; ++r)
for (unsigned r = 0, e = PhysReg2LiveUnion.size(); r != e; ++r)
PhysReg2LiveUnion[r].clear();
}
@ -253,7 +234,8 @@ void RegAllocBase::addMBBLiveIns(MachineFunction *MF) {
return;
LiveIntervalUnion::SegmentIter SI;
for (unsigned PhysReg = 0; PhysReg < PhysReg2LiveUnion.numRegs(); ++PhysReg) {
for (unsigned PhysReg = 0, NumRegs = TRI->getNumRegs(); PhysReg != NumRegs;
++PhysReg) {
LiveIntervalUnion &LiveUnion = PhysReg2LiveUnion[PhysReg];
if (LiveUnion.empty())
continue;

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@ -62,27 +62,7 @@ class RegAllocBase {
// registers may have changed.
unsigned UserTag;
// Array of LiveIntervalUnions indexed by physical register.
class LiveUnionArray {
unsigned NumRegs;
LiveIntervalUnion *Array;
public:
LiveUnionArray(): NumRegs(0), Array(0) {}
~LiveUnionArray() { clear(); }
unsigned numRegs() const { return NumRegs; }
void init(LiveIntervalUnion::Allocator &, unsigned NRegs);
void clear();
LiveIntervalUnion& operator[](unsigned PhysReg) {
assert(PhysReg < NumRegs && "physReg out of bounds");
return Array[PhysReg];
}
};
LiveUnionArray PhysReg2LiveUnion;
LiveIntervalUnion::Array PhysReg2LiveUnion;
// Current queries, one per physreg. They must be reinitialized each time we
// query on a new live virtual register.