6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2025-04-11 16:37:42 +00:00
Code Issues Projects Releases Wiki Activity

Remove subtarget dependence in pass pipeline setup for AArch64.

Browse Source 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231165 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Eric Christopher 2015-03-03 23:22:40 +00:00
parent ec0a396ffa
commit 0e5fc6e238
2 changed files with 6 additions and 4 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

5
lib/Target/AArch64/AArch64A57FPLoadBalancing.cpp
View File

@ -307,6 +307,11 @@ public:
//===----------------------------------------------------------------------===//
bool AArch64A57FPLoadBalancing::runOnMachineFunction(MachineFunction &F) {
// Don't do anything if this isn't an A53 or A57.
if (!(F.getSubtarget<AArch64Subtarget>().isCortexA53() ||
F.getSubtarget<AArch64Subtarget>().isCortexA57()))
return false;
bool Changed = false;
DEBUG(dbgs() << "***** AArch64A57FPLoadBalancing *****\n");

5
lib/Target/AArch64/AArch64TargetMachine.cpp
View File

@ -287,10 +287,7 @@ void AArch64PassConfig::addPostRegAlloc() {
// Change dead register definitions to refer to the zero register.
if (TM->getOptLevel() != CodeGenOpt::None && EnableDeadRegisterElimination)
addPass(createAArch64DeadRegisterDefinitions());
if (TM->getOptLevel() != CodeGenOpt::None &&
(TM->getSubtarget<AArch64Subtarget>().isCortexA53() ||
TM->getSubtarget<AArch64Subtarget>().isCortexA57()) &&
usingDefaultRegAlloc())
if (TM->getOptLevel() != CodeGenOpt::None && usingDefaultRegAlloc())
// Improve performance for some FP/SIMD code for A57.
addPass(createAArch64A57FPLoadBalancing());
}