mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2026-04-26 12:20:42 +00:00
Sink getDwarfRegNum, getLLVMRegNum, getSEHRegNum from TargetRegisterInfo down
to MCRegisterInfo. Also initialize the mapping at construction time. This patch eliminate TargetRegisterInfo from TargetAsmInfo. It's another step towards fixing the layering violation. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135424 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
@@ -98,8 +98,6 @@ namespace {
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void emitMemModRMByte(const MachineInstr &MI,
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unsigned Op, unsigned RegOpcodeField,
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intptr_t PCAdj = 0);
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unsigned getX86RegNum(unsigned RegNo) const;
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};
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template<class CodeEmitter>
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@@ -346,11 +344,6 @@ void Emitter<CodeEmitter>::emitJumpTableAddress(unsigned JTI, unsigned Reloc,
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MCE.emitWordLE(0);
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}
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template<class CodeEmitter>
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unsigned Emitter<CodeEmitter>::getX86RegNum(unsigned RegNo) const {
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return X86RegisterInfo::getX86RegNum(RegNo);
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}
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inline static unsigned char ModRMByte(unsigned Mod, unsigned RegOpcode,
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unsigned RM) {
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assert(Mod < 4 && RegOpcode < 8 && RM < 8 && "ModRM Fields out of range!");
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@@ -360,7 +353,7 @@ inline static unsigned char ModRMByte(unsigned Mod, unsigned RegOpcode,
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template<class CodeEmitter>
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void Emitter<CodeEmitter>::emitRegModRMByte(unsigned ModRMReg,
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unsigned RegOpcodeFld){
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MCE.emitByte(ModRMByte(3, RegOpcodeFld, getX86RegNum(ModRMReg)));
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MCE.emitByte(ModRMByte(3, RegOpcodeFld, X86_MC::getX86RegNum(ModRMReg)));
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}
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template<class CodeEmitter>
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@@ -498,7 +491,7 @@ void Emitter<CodeEmitter>::emitMemModRMByte(const MachineInstr &MI,
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// 2-7) and absolute references.
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unsigned BaseRegNo = -1U;
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if (BaseReg != 0 && BaseReg != X86::RIP)
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BaseRegNo = getX86RegNum(BaseReg);
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BaseRegNo = X86_MC::getX86RegNum(BaseReg);
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if (// The SIB byte must be used if there is an index register.
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IndexReg.getReg() == 0 &&
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@@ -574,15 +567,15 @@ void Emitter<CodeEmitter>::emitMemModRMByte(const MachineInstr &MI,
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// Manual 2A, table 2-7. The displacement has already been output.
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unsigned IndexRegNo;
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if (IndexReg.getReg())
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IndexRegNo = getX86RegNum(IndexReg.getReg());
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IndexRegNo = X86_MC::getX86RegNum(IndexReg.getReg());
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else // Examples: [ESP+1*<noreg>+4] or [scaled idx]+disp32 (MOD=0,BASE=5)
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IndexRegNo = 4;
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emitSIBByte(SS, IndexRegNo, 5);
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} else {
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unsigned BaseRegNo = getX86RegNum(BaseReg);
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unsigned BaseRegNo = X86_MC::getX86RegNum(BaseReg);
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unsigned IndexRegNo;
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if (IndexReg.getReg())
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IndexRegNo = getX86RegNum(IndexReg.getReg());
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IndexRegNo = X86_MC::getX86RegNum(IndexReg.getReg());
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else
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IndexRegNo = 4; // For example [ESP+1*<noreg>+4]
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emitSIBByte(SS, IndexRegNo, BaseRegNo);
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@@ -809,7 +802,8 @@ void Emitter<CodeEmitter>::emitInstruction(MachineInstr &MI,
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}
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case X86II::AddRegFrm: {
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MCE.emitByte(BaseOpcode + getX86RegNum(MI.getOperand(CurOp++).getReg()));
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MCE.emitByte(BaseOpcode +
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X86_MC::getX86RegNum(MI.getOperand(CurOp++).getReg()));
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if (CurOp == NumOps)
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break;
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@@ -844,7 +838,7 @@ void Emitter<CodeEmitter>::emitInstruction(MachineInstr &MI,
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case X86II::MRMDestReg: {
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MCE.emitByte(BaseOpcode);
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emitRegModRMByte(MI.getOperand(CurOp).getReg(),
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getX86RegNum(MI.getOperand(CurOp+1).getReg()));
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X86_MC::getX86RegNum(MI.getOperand(CurOp+1).getReg()));
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CurOp += 2;
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if (CurOp != NumOps)
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emitConstant(MI.getOperand(CurOp++).getImm(),
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@@ -854,7 +848,7 @@ void Emitter<CodeEmitter>::emitInstruction(MachineInstr &MI,
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case X86II::MRMDestMem: {
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MCE.emitByte(BaseOpcode);
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emitMemModRMByte(MI, CurOp,
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getX86RegNum(MI.getOperand(CurOp + X86::AddrNumOperands)
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X86_MC::getX86RegNum(MI.getOperand(CurOp + X86::AddrNumOperands)
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.getReg()));
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CurOp += X86::AddrNumOperands + 1;
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if (CurOp != NumOps)
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@@ -866,7 +860,7 @@ void Emitter<CodeEmitter>::emitInstruction(MachineInstr &MI,
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case X86II::MRMSrcReg:
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MCE.emitByte(BaseOpcode);
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emitRegModRMByte(MI.getOperand(CurOp+1).getReg(),
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getX86RegNum(MI.getOperand(CurOp).getReg()));
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X86_MC::getX86RegNum(MI.getOperand(CurOp).getReg()));
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CurOp += 2;
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if (CurOp != NumOps)
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emitConstant(MI.getOperand(CurOp++).getImm(),
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@@ -880,8 +874,8 @@ void Emitter<CodeEmitter>::emitInstruction(MachineInstr &MI,
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X86II::getSizeOfImm(Desc->TSFlags) : 0;
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MCE.emitByte(BaseOpcode);
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emitMemModRMByte(MI, CurOp+1, getX86RegNum(MI.getOperand(CurOp).getReg()),
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PCAdj);
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emitMemModRMByte(MI, CurOp+1,
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X86_MC::getX86RegNum(MI.getOperand(CurOp).getReg()),PCAdj);
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CurOp += AddrOperands + 1;
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if (CurOp != NumOps)
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emitConstant(MI.getOperand(CurOp++).getImm(),
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@@ -968,7 +962,7 @@ void Emitter<CodeEmitter>::emitInstruction(MachineInstr &MI,
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MCE.emitByte(BaseOpcode);
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// Duplicate register, used by things like MOV8r0 (aka xor reg,reg).
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emitRegModRMByte(MI.getOperand(CurOp).getReg(),
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getX86RegNum(MI.getOperand(CurOp).getReg()));
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X86_MC::getX86RegNum(MI.getOperand(CurOp).getReg()));
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++CurOp;
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break;
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