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swtich vector-> smallvector, speeding up selectiondag stuff 1%

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33861 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner 2007-02-04 01:20:02 +00:00
parent 40030bfa75
commit 0ed4417075
1 changed files with 2 additions and 2 deletions
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4
lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
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@ -303,7 +303,7 @@ SelectionDAGLegalize::SelectionDAGLegalize(SelectionDAG &dag)
/// ComputeTopDownOrdering - Add the specified node to the Order list if it has
/// not been visited yet and if all of its operands have already been visited.
static void ComputeTopDownOrdering(SDNode *N, std::vector<SDNode*> &Order,
static void ComputeTopDownOrdering(SDNode *N, SmallVector<SDNode*, 64> &Order,
DenseMap<SDNode*, unsigned> &Visited) {
if (++Visited[N] != N->getNumOperands())
return; // Haven't visited all operands yet
@ -333,7 +333,7 @@ void SelectionDAGLegalize::LegalizeDAG() {
// blocks. To avoid this problem, compute an ordering of the nodes where each
// node is only legalized after all of its operands are legalized.
DenseMap<SDNode*, unsigned> Visited;
std::vector<SDNode*> Order;
SmallVector<SDNode*, 64> Order;
// Compute ordering from all of the leaves in the graphs, those (like the
// entry node) that have no operands.