mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-08-21 18:29:46 +00:00
Make X86::FsFLD0SS / FsFLD0SD real pseudo-instructions.
Like V_SET0, these instructions are expanded by ExpandPostRA to xorps / vxorps so they can participate in execution domain swizzling. This also makes the AVX variants redundant. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145440 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -2121,7 +2121,7 @@ unsigned X86FastISel::TargetMaterializeFloatZero(const ConstantFP *CF) {
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default: return false;
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case MVT::f32:
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if (X86ScalarSSEf32) {
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Opc = Subtarget->hasAVX() ? X86::VFsFLD0SS : X86::FsFLD0SS;
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Opc = X86::FsFLD0SS;
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RC = X86::FR32RegisterClass;
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} else {
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Opc = X86::LD_Fp032;
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@ -2130,7 +2130,7 @@ unsigned X86FastISel::TargetMaterializeFloatZero(const ConstantFP *CF) {
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break;
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case MVT::f64:
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if (X86ScalarSSEf64) {
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Opc = Subtarget->hasAVX() ? X86::VFsFLD0SD : X86::FsFLD0SD;
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Opc = X86::FsFLD0SD;
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RC = X86::FR64RegisterClass;
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} else {
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Opc = X86::LD_Fp064;
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@ -2556,6 +2556,8 @@ bool X86InstrInfo::expandPostRAPseudo(MachineBasicBlock::iterator MI) const {
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bool HasAVX = TM.getSubtarget<X86Subtarget>().hasAVX();
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switch (MI->getOpcode()) {
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case X86::V_SET0:
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case X86::FsFLD0SS:
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case X86::FsFLD0SD:
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return Expand2AddrUndef(MI, get(HasAVX ? X86::VXORPSrr : X86::XORPSrr));
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case X86::TEST8ri_NOREX:
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MI->setDesc(get(X86::TEST8ri));
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@ -2911,11 +2913,9 @@ MachineInstr* X86InstrInfo::foldMemoryOperandImpl(MachineFunction &MF,
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Alignment = 16;
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break;
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case X86::FsFLD0SD:
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case X86::VFsFLD0SD:
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Alignment = 8;
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break;
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case X86::FsFLD0SS:
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case X86::VFsFLD0SS:
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Alignment = 4;
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break;
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default:
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@ -2950,9 +2950,7 @@ MachineInstr* X86InstrInfo::foldMemoryOperandImpl(MachineFunction &MF,
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case X86::AVX_SETALLONES:
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case X86::AVX2_SETALLONES:
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case X86::FsFLD0SD:
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case X86::FsFLD0SS:
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case X86::VFsFLD0SD:
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case X86::VFsFLD0SS: {
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case X86::FsFLD0SS: {
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// Folding a V_SET0 or V_SETALLONES as a load, to ease register pressure.
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// Create a constant-pool entry and operands to load from it.
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@ -2978,9 +2976,9 @@ MachineInstr* X86InstrInfo::foldMemoryOperandImpl(MachineFunction &MF,
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MachineConstantPool &MCP = *MF.getConstantPool();
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Type *Ty;
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unsigned Opc = LoadMI->getOpcode();
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if (Opc == X86::FsFLD0SS || Opc == X86::VFsFLD0SS)
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if (Opc == X86::FsFLD0SS)
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Ty = Type::getFloatTy(MF.getFunction()->getContext());
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else if (Opc == X86::FsFLD0SD || Opc == X86::VFsFLD0SD)
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else if (Opc == X86::FsFLD0SD)
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Ty = Type::getDoubleTy(MF.getFunction()->getContext());
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else if (Opc == X86::AVX_SET0PSY || Opc == X86::AVX_SET0PDY)
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Ty = VectorType::get(Type::getFloatTy(MF.getFunction()->getContext()), 8);
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@ -473,6 +473,7 @@ def HasSSE4A : Predicate<"Subtarget->hasSSE4A()">;
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def HasAVX : Predicate<"Subtarget->hasAVX()">;
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def HasAVX2 : Predicate<"Subtarget->hasAVX2()">;
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def HasXMM : Predicate<"Subtarget->hasXMM()">;
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def HasXMMInt : Predicate<"Subtarget->hasXMMInt()">;
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def HasPOPCNT : Predicate<"Subtarget->hasPOPCNT()">;
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@ -240,21 +240,13 @@ let Predicates = [HasAVX] in {
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}
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// Alias instructions that map fld0 to pxor for sse.
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// FIXME: Set encoding to pseudo!
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let isReMaterializable = 1, isAsCheapAsAMove = 1, isCodeGenOnly = 1,
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canFoldAsLoad = 1 in {
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def FsFLD0SS : I<0xEF, MRMInitReg, (outs FR32:$dst), (ins), "",
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[(set FR32:$dst, fp32imm0)]>,
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Requires<[HasSSE1]>, TB, OpSize;
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def FsFLD0SD : I<0xEF, MRMInitReg, (outs FR64:$dst), (ins), "",
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[(set FR64:$dst, fpimm0)]>,
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Requires<[HasSSE2]>, TB, OpSize;
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def VFsFLD0SS : I<0xEF, MRMInitReg, (outs FR32:$dst), (ins), "",
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[(set FR32:$dst, fp32imm0)]>,
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Requires<[HasAVX]>, TB, OpSize, VEX_4V;
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def VFsFLD0SD : I<0xEF, MRMInitReg, (outs FR64:$dst), (ins), "",
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[(set FR64:$dst, fpimm0)]>,
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Requires<[HasAVX]>, TB, OpSize, VEX_4V;
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// This is expanded by ExpandPostRAPseudos.
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let isReMaterializable = 1, isAsCheapAsAMove = 1, canFoldAsLoad = 1,
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isPseudo = 1 in {
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def FsFLD0SS : I<0, Pseudo, (outs FR32:$dst), (ins), "",
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[(set FR32:$dst, fp32imm0)]>, Requires<[HasXMM]>;
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def FsFLD0SD : I<0, Pseudo, (outs FR64:$dst), (ins), "",
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[(set FR64:$dst, fpimm0)]>, Requires<[HasXMMInt]>;
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}
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//===----------------------------------------------------------------------===//
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@ -368,10 +368,6 @@ ReSimplify:
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case X86::SETB_C64r: LowerUnaryToTwoAddr(OutMI, X86::SBB64rr); break;
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case X86::MOV8r0: LowerUnaryToTwoAddr(OutMI, X86::XOR8rr); break;
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case X86::MOV32r0: LowerUnaryToTwoAddr(OutMI, X86::XOR32rr); break;
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case X86::FsFLD0SS: LowerUnaryToTwoAddr(OutMI, X86::PXORrr); break;
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case X86::FsFLD0SD: LowerUnaryToTwoAddr(OutMI, X86::PXORrr); break;
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case X86::VFsFLD0SS: LowerUnaryToTwoAddr(OutMI, X86::VPXORrr); break;
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case X86::VFsFLD0SD: LowerUnaryToTwoAddr(OutMI, X86::VPXORrr); break;
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case X86::V_SETALLONES: LowerUnaryToTwoAddr(OutMI, X86::PCMPEQDrr); break;
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case X86::AVX_SET0PSY: LowerUnaryToTwoAddr(OutMI, X86::VXORPSYrr); break;
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case X86::AVX_SET0PDY: LowerUnaryToTwoAddr(OutMI, X86::VXORPDYrr); break;
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@ -1,5 +1,5 @@
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; RUN: llc < %s -mcpu=core2 | grep pxor | count 2
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; RUN: llc < %s -mcpu=core2 | not grep movapd
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; RUN: llc < %s -mcpu=core2 | grep xorps | count 2
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; RUN: llc < %s -mcpu=core2 | not grep movap
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; PR2715
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target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
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@ -11,7 +11,7 @@ entry:
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define float @extractFloat2() nounwind {
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entry:
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; CHECK: pxor %xmm0, %xmm0
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; CHECK: xorps %xmm0, %xmm0
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%tmp4 = bitcast <1 x double> <double 0x000000003F800000> to <2 x float>
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%tmp5 = extractelement <2 x float> %tmp4, i32 1
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ret float %tmp5
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@ -225,18 +225,20 @@ if.else: ; preds = %entry
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; CHECK-NEXT: je
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}
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; Check that 0.0 is materialized using pxor
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; Check that 0.0 is materialized using xorps
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define void @test18(float* %p1) {
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store float 0.0, float* %p1
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ret void
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; CHECK: test18:
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; CHECK: pxor
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; CHECK: xorps
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}
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; Without any type hints, doubles use the smaller xorps instead of xorpd.
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define void @test19(double* %p1) {
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store double 0.0, double* %p1
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ret void
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; CHECK: test19:
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; CHECK: pxor
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; CHECK: xorps
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}
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; Check that we fast-isel sret
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@ -252,12 +254,12 @@ entry:
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}
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declare void @test20sret(%struct.a* sret)
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; Check that -0.0 is not materialized using pxor
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; Check that -0.0 is not materialized using xor
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define void @test21(double* %p1) {
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store double -0.0, double* %p1
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ret void
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; CHECK: test21:
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; CHECK-NOT: pxor
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; CHECK-NOT: xor
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; CHECK: movsd LCPI
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}
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@ -1,4 +1,4 @@
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; RUN: llc < %s -march=x86-64 | grep {pxor %xmm0, %xmm0} | count 2
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; RUN: llc < %s -march=x86-64 | grep {xorps %xmm0, %xmm0} | count 2
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define float @foo(<4 x float> %a) {
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%b = insertelement <4 x float> %a, float 0.0, i32 3
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@ -45,6 +45,7 @@ while.end:
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}
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; CHECK: f2
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; CHECK: for.body
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;
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; This loop contains two cvtsi2ss instructions that update the same xmm
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; register. Verify that the execution dependency fix pass breaks those
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@ -140,15 +140,15 @@ define double @ole_inverse(double %x, double %y) nounwind {
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}
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; CHECK: x_ogt:
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; CHECK-NEXT: pxor %xmm1, %xmm1
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; CHECK-NEXT: xorp{{[sd]}} %xmm1, %xmm1
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; CHECK-NEXT: maxsd %xmm1, %xmm0
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; CHECK-NEXT: ret
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; UNSAFE: x_ogt:
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; UNSAFE-NEXT: pxor %xmm1, %xmm1
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; UNSAFE-NEXT: xorp{{[sd]}} %xmm1, %xmm1
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; UNSAFE-NEXT: maxsd %xmm1, %xmm0
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; UNSAFE-NEXT: ret
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; FINITE: x_ogt:
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; FINITE-NEXT: pxor %xmm1, %xmm1
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; FINITE-NEXT: xorp{{[sd]}} %xmm1, %xmm1
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; FINITE-NEXT: maxsd %xmm1, %xmm0
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; FINITE-NEXT: ret
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define double @x_ogt(double %x) nounwind {
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@ -158,15 +158,15 @@ define double @x_ogt(double %x) nounwind {
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}
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; CHECK: x_olt:
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; CHECK-NEXT: pxor %xmm1, %xmm1
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; CHECK-NEXT: xorp{{[sd]}} %xmm1, %xmm1
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; CHECK-NEXT: minsd %xmm1, %xmm0
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; CHECK-NEXT: ret
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; UNSAFE: x_olt:
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; UNSAFE-NEXT: pxor %xmm1, %xmm1
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; UNSAFE-NEXT: xorp{{[sd]}} %xmm1, %xmm1
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; UNSAFE-NEXT: minsd %xmm1, %xmm0
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; UNSAFE-NEXT: ret
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; FINITE: x_olt:
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; FINITE-NEXT: pxor %xmm1, %xmm1
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; FINITE-NEXT: xorp{{[sd]}} %xmm1, %xmm1
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; FINITE-NEXT: minsd %xmm1, %xmm0
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; FINITE-NEXT: ret
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define double @x_olt(double %x) nounwind {
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@ -176,17 +176,17 @@ define double @x_olt(double %x) nounwind {
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}
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; CHECK: x_ogt_inverse:
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; CHECK-NEXT: pxor %xmm1, %xmm1
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; CHECK-NEXT: xorp{{[sd]}} %xmm1, %xmm1
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; CHECK-NEXT: minsd %xmm0, %xmm1
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; CHECK-NEXT: movap{{[sd]}} %xmm1, %xmm0
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; CHECK-NEXT: ret
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; UNSAFE: x_ogt_inverse:
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; UNSAFE-NEXT: pxor %xmm1, %xmm1
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; UNSAFE-NEXT: xorp{{[sd]}} %xmm1, %xmm1
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; UNSAFE-NEXT: minsd %xmm0, %xmm1
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; UNSAFE-NEXT: movap{{[sd]}} %xmm1, %xmm0
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; UNSAFE-NEXT: ret
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; FINITE: x_ogt_inverse:
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; FINITE-NEXT: pxor %xmm1, %xmm1
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; FINITE-NEXT: xorp{{[sd]}} %xmm1, %xmm1
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; FINITE-NEXT: minsd %xmm0, %xmm1
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; FINITE-NEXT: movap{{[sd]}} %xmm1, %xmm0
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; FINITE-NEXT: ret
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@ -197,17 +197,17 @@ define double @x_ogt_inverse(double %x) nounwind {
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}
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; CHECK: x_olt_inverse:
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; CHECK-NEXT: pxor %xmm1, %xmm1
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; CHECK-NEXT: xorp{{[sd]}} %xmm1, %xmm1
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; CHECK-NEXT: maxsd %xmm0, %xmm1
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; CHECK-NEXT: movap{{[sd]}} %xmm1, %xmm0
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; CHECK-NEXT: ret
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; UNSAFE: x_olt_inverse:
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; UNSAFE-NEXT: pxor %xmm1, %xmm1
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; UNSAFE-NEXT: xorp{{[sd]}} %xmm1, %xmm1
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; UNSAFE-NEXT: maxsd %xmm0, %xmm1
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; UNSAFE-NEXT: movap{{[sd]}} %xmm1, %xmm0
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; UNSAFE-NEXT: ret
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; FINITE: x_olt_inverse:
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; FINITE-NEXT: pxor %xmm1, %xmm1
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; FINITE-NEXT: xorp{{[sd]}} %xmm1, %xmm1
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; FINITE-NEXT: maxsd %xmm0, %xmm1
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; FINITE-NEXT: movap{{[sd]}} %xmm1, %xmm0
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; FINITE-NEXT: ret
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@ -220,11 +220,11 @@ define double @x_olt_inverse(double %x) nounwind {
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; CHECK: x_oge:
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; CHECK: ucomisd %xmm1, %xmm0
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; UNSAFE: x_oge:
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; UNSAFE-NEXT: pxor %xmm1, %xmm1
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; UNSAFE-NEXT: xorp{{[sd]}} %xmm1, %xmm1
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; UNSAFE-NEXT: maxsd %xmm1, %xmm0
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; UNSAFE-NEXT: ret
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; FINITE: x_oge:
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; FINITE-NEXT: pxor %xmm1, %xmm1
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; FINITE-NEXT: xorp{{[sd]}} %xmm1, %xmm1
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; FINITE-NEXT: maxsd %xmm1, %xmm0
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; FINITE-NEXT: ret
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define double @x_oge(double %x) nounwind {
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@ -236,11 +236,11 @@ define double @x_oge(double %x) nounwind {
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; CHECK: x_ole:
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; CHECK: ucomisd %xmm0, %xmm1
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; UNSAFE: x_ole:
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; UNSAFE-NEXT: pxor %xmm1, %xmm1
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; UNSAFE-NEXT: xorp{{[sd]}} %xmm1, %xmm1
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; UNSAFE-NEXT: minsd %xmm1, %xmm0
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; UNSAFE-NEXT: ret
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; FINITE: x_ole:
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; FINITE-NEXT: pxor %xmm1, %xmm1
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; FINITE-NEXT: xorp{{[sd]}} %xmm1, %xmm1
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; FINITE-NEXT: minsd %xmm1, %xmm0
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; FINITE-NEXT: ret
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define double @x_ole(double %x) nounwind {
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@ -252,12 +252,12 @@ define double @x_ole(double %x) nounwind {
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; CHECK: x_oge_inverse:
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; CHECK: ucomisd %xmm1, %xmm0
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; UNSAFE: x_oge_inverse:
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; UNSAFE-NEXT: pxor %xmm1, %xmm1
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; UNSAFE-NEXT: xorp{{[sd]}} %xmm1, %xmm1
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; UNSAFE-NEXT: minsd %xmm0, %xmm1
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; UNSAFE-NEXT: movap{{[sd]}} %xmm1, %xmm0
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; UNSAFE-NEXT: ret
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; FINITE: x_oge_inverse:
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; FINITE-NEXT: pxor %xmm1, %xmm1
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; FINITE-NEXT: xorp{{[sd]}} %xmm1, %xmm1
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; FINITE-NEXT: minsd %xmm0, %xmm1
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; FINITE-NEXT: movap{{[sd]}} %xmm1, %xmm0
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; FINITE-NEXT: ret
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@ -270,12 +270,12 @@ define double @x_oge_inverse(double %x) nounwind {
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; CHECK: x_ole_inverse:
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; CHECK: ucomisd %xmm0, %xmm1
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; UNSAFE: x_ole_inverse:
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; UNSAFE-NEXT: pxor %xmm1, %xmm1
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; UNSAFE-NEXT: xorp{{[sd]}} %xmm1, %xmm1
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; UNSAFE-NEXT: maxsd %xmm0, %xmm1
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; UNSAFE-NEXT: movap{{[sd]}} %xmm1, %xmm0
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; UNSAFE-NEXT: ret
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; FINITE: x_ole_inverse:
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; FINITE-NEXT: pxor %xmm1, %xmm1
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; FINITE-NEXT: xorp{{[sd]}} %xmm1, %xmm1
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; FINITE-NEXT: maxsd %xmm0, %xmm1
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; FINITE-NEXT: movap{{[sd]}} %xmm1, %xmm0
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; FINITE-NEXT: ret
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@ -414,11 +414,11 @@ define double @ule_inverse(double %x, double %y) nounwind {
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; CHECK: x_ugt:
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; CHECK: ucomisd %xmm0, %xmm1
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; UNSAFE: x_ugt:
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; UNSAFE-NEXT: pxor %xmm1, %xmm1
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; UNSAFE-NEXT: xorp{{[sd]}} %xmm1, %xmm1
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; UNSAFE-NEXT: maxsd %xmm1, %xmm0
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; UNSAFE-NEXT: ret
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; FINITE: x_ugt:
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; FINITE-NEXT: pxor %xmm1, %xmm1
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; FINITE-NEXT: xorp{{[sd]}} %xmm1, %xmm1
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; FINITE-NEXT: maxsd %xmm1, %xmm0
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; FINITE-NEXT: ret
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define double @x_ugt(double %x) nounwind {
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@ -430,11 +430,11 @@ define double @x_ugt(double %x) nounwind {
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; CHECK: x_ult:
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; CHECK: ucomisd %xmm1, %xmm0
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; UNSAFE: x_ult:
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; UNSAFE-NEXT: pxor %xmm1, %xmm1
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; UNSAFE-NEXT: xorp{{[sd]}} %xmm1, %xmm1
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; UNSAFE-NEXT: minsd %xmm1, %xmm0
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; UNSAFE-NEXT: ret
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; FINITE: x_ult:
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; FINITE-NEXT: pxor %xmm1, %xmm1
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; FINITE-NEXT: xorp{{[sd]}} %xmm1, %xmm1
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; FINITE-NEXT: minsd %xmm1, %xmm0
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; FINITE-NEXT: ret
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define double @x_ult(double %x) nounwind {
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@ -446,12 +446,12 @@ define double @x_ult(double %x) nounwind {
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; CHECK: x_ugt_inverse:
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; CHECK: ucomisd %xmm0, %xmm1
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; UNSAFE: x_ugt_inverse:
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; UNSAFE-NEXT: pxor %xmm1, %xmm1
|
||||
; UNSAFE-NEXT: xorp{{[sd]}} %xmm1, %xmm1
|
||||
; UNSAFE-NEXT: minsd %xmm0, %xmm1
|
||||
; UNSAFE-NEXT: movap{{[sd]}} %xmm1, %xmm0
|
||||
; UNSAFE-NEXT: ret
|
||||
; FINITE: x_ugt_inverse:
|
||||
; FINITE-NEXT: pxor %xmm1, %xmm1
|
||||
; FINITE-NEXT: xorp{{[sd]}} %xmm1, %xmm1
|
||||
; FINITE-NEXT: minsd %xmm0, %xmm1
|
||||
; FINITE-NEXT: movap{{[sd]}} %xmm1, %xmm0
|
||||
; FINITE-NEXT: ret
|
||||
@ -464,12 +464,12 @@ define double @x_ugt_inverse(double %x) nounwind {
|
||||
; CHECK: x_ult_inverse:
|
||||
; CHECK: ucomisd %xmm1, %xmm0
|
||||
; UNSAFE: x_ult_inverse:
|
||||
; UNSAFE-NEXT: pxor %xmm1, %xmm1
|
||||
; UNSAFE-NEXT: xorp{{[sd]}} %xmm1, %xmm1
|
||||
; UNSAFE-NEXT: maxsd %xmm0, %xmm1
|
||||
; UNSAFE-NEXT: movap{{[sd]}} %xmm1, %xmm0
|
||||
; UNSAFE-NEXT: ret
|
||||
; FINITE: x_ult_inverse:
|
||||
; FINITE-NEXT: pxor %xmm1, %xmm1
|
||||
; FINITE-NEXT: xorp{{[sd]}} %xmm1, %xmm1
|
||||
; FINITE-NEXT: maxsd %xmm0, %xmm1
|
||||
; FINITE-NEXT: movap{{[sd]}} %xmm1, %xmm0
|
||||
; FINITE-NEXT: ret
|
||||
@ -480,16 +480,16 @@ define double @x_ult_inverse(double %x) nounwind {
|
||||
}
|
||||
|
||||
; CHECK: x_uge:
|
||||
; CHECK-NEXT: pxor %xmm1, %xmm1
|
||||
; CHECK-NEXT: xorp{{[sd]}} %xmm1, %xmm1
|
||||
; CHECK-NEXT: maxsd %xmm0, %xmm1
|
||||
; CHECK-NEXT: movap{{[sd]}} %xmm1, %xmm0
|
||||
; CHECK-NEXT: ret
|
||||
; UNSAFE: x_uge:
|
||||
; UNSAFE-NEXT: pxor %xmm1, %xmm1
|
||||
; UNSAFE-NEXT: xorp{{[sd]}} %xmm1, %xmm1
|
||||
; UNSAFE-NEXT: maxsd %xmm1, %xmm0
|
||||
; UNSAFE-NEXT: ret
|
||||
; FINITE: x_uge:
|
||||
; FINITE-NEXT: pxor %xmm1, %xmm1
|
||||
; FINITE-NEXT: xorp{{[sd]}} %xmm1, %xmm1
|
||||
; FINITE-NEXT: maxsd %xmm1, %xmm0
|
||||
; FINITE-NEXT: ret
|
||||
define double @x_uge(double %x) nounwind {
|
||||
@ -499,16 +499,16 @@ define double @x_uge(double %x) nounwind {
|
||||
}
|
||||
|
||||
; CHECK: x_ule:
|
||||
; CHECK-NEXT: pxor %xmm1, %xmm1
|
||||
; CHECK-NEXT: xorp{{[sd]}} %xmm1, %xmm1
|
||||
; CHECK-NEXT: minsd %xmm0, %xmm1
|
||||
; CHECK-NEXT: movap{{[sd]}} %xmm1, %xmm0
|
||||
; CHECK-NEXT: ret
|
||||
; UNSAFE: x_ule:
|
||||
; UNSAFE-NEXT: pxor %xmm1, %xmm1
|
||||
; UNSAFE-NEXT: xorp{{[sd]}} %xmm1, %xmm1
|
||||
; UNSAFE-NEXT: minsd %xmm1, %xmm0
|
||||
; UNSAFE-NEXT: ret
|
||||
; FINITE: x_ule:
|
||||
; FINITE-NEXT: pxor %xmm1, %xmm1
|
||||
; FINITE-NEXT: xorp{{[sd]}} %xmm1, %xmm1
|
||||
; FINITE-NEXT: minsd %xmm1, %xmm0
|
||||
; FINITE-NEXT: ret
|
||||
define double @x_ule(double %x) nounwind {
|
||||
@ -518,16 +518,16 @@ define double @x_ule(double %x) nounwind {
|
||||
}
|
||||
|
||||
; CHECK: x_uge_inverse:
|
||||
; CHECK-NEXT: pxor %xmm1, %xmm1
|
||||
; CHECK-NEXT: xorp{{[sd]}} %xmm1, %xmm1
|
||||
; CHECK-NEXT: minsd %xmm1, %xmm0
|
||||
; CHECK-NEXT: ret
|
||||
; UNSAFE: x_uge_inverse:
|
||||
; UNSAFE-NEXT: pxor %xmm1, %xmm1
|
||||
; UNSAFE-NEXT: xorp{{[sd]}} %xmm1, %xmm1
|
||||
; UNSAFE-NEXT: minsd %xmm0, %xmm1
|
||||
; UNSAFE-NEXT: movap{{[sd]}} %xmm1, %xmm0
|
||||
; UNSAFE-NEXT: ret
|
||||
; FINITE: x_uge_inverse:
|
||||
; FINITE-NEXT: pxor %xmm1, %xmm1
|
||||
; FINITE-NEXT: xorp{{[sd]}} %xmm1, %xmm1
|
||||
; FINITE-NEXT: minsd %xmm0, %xmm1
|
||||
; FINITE-NEXT: movap{{[sd]}} %xmm1, %xmm0
|
||||
; FINITE-NEXT: ret
|
||||
@ -538,16 +538,16 @@ define double @x_uge_inverse(double %x) nounwind {
|
||||
}
|
||||
|
||||
; CHECK: x_ule_inverse:
|
||||
; CHECK-NEXT: pxor %xmm1, %xmm1
|
||||
; CHECK-NEXT: xorp{{[sd]}} %xmm1, %xmm1
|
||||
; CHECK-NEXT: maxsd %xmm1, %xmm0
|
||||
; CHECK-NEXT: ret
|
||||
; UNSAFE: x_ule_inverse:
|
||||
; UNSAFE-NEXT: pxor %xmm1, %xmm1
|
||||
; UNSAFE-NEXT: xorp{{[sd]}} %xmm1, %xmm1
|
||||
; UNSAFE-NEXT: maxsd %xmm0, %xmm1
|
||||
; UNSAFE-NEXT: movap{{[sd]}} %xmm1, %xmm0
|
||||
; UNSAFE-NEXT: ret
|
||||
; FINITE: x_ule_inverse:
|
||||
; FINITE-NEXT: pxor %xmm1, %xmm1
|
||||
; FINITE-NEXT: xorp{{[sd]}} %xmm1, %xmm1
|
||||
; FINITE-NEXT: maxsd %xmm0, %xmm1
|
||||
; FINITE-NEXT: movap{{[sd]}} %xmm1, %xmm0
|
||||
; FINITE-NEXT: ret
|
||||
|
@ -16,9 +16,9 @@ define double @foo() nounwind {
|
||||
;CHECK-32: ret
|
||||
|
||||
;CHECK-64: foo:
|
||||
;CHECK-64: pxor
|
||||
;CHECK-64: xorps
|
||||
;CHECK-64: call
|
||||
;CHECK-64: pxor
|
||||
;CHECK-64: xorps
|
||||
;CHECK-64: ret
|
||||
}
|
||||
|
||||
@ -33,8 +33,8 @@ define float @foof() nounwind {
|
||||
;CHECK-32: ret
|
||||
|
||||
;CHECK-64: foof:
|
||||
;CHECK-64: pxor
|
||||
;CHECK-64: xorps
|
||||
;CHECK-64: call
|
||||
;CHECK-64: pxor
|
||||
;CHECK-64: xorps
|
||||
;CHECK-64: ret
|
||||
}
|
||||
|
Loading…
Reference in New Issue
Block a user