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For 16 and 32-bit multiplies, use the IMUL instruction instead of the MUL instruction.
This allows us to not force the use of the EAX/AX registers! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6830 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -1069,8 +1069,6 @@ void ISel::emitSimpleBinaryOperation(MachineBasicBlock *BB,
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/// registers op0Reg and op1Reg, and put the result in DestReg. The type of the
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/// result should be given as DestTy.
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///
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/// FIXME: doMultiply should use one of the two address IMUL instructions!
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///
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void ISel::doMultiply(MachineBasicBlock *MBB, MachineBasicBlock::iterator &MBBI,
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unsigned DestReg, const Type *DestTy,
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unsigned op0Reg, unsigned op1Reg) {
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@ -1079,28 +1077,20 @@ void ISel::doMultiply(MachineBasicBlock *MBB, MachineBasicBlock::iterator &MBBI,
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case cFP: // Floating point multiply
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BMI(BB, MBBI, X86::FpMUL, 2, DestReg).addReg(op0Reg).addReg(op1Reg);
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return;
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case cInt:
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case cShort:
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BMI(BB, MBBI, Class == cInt ? X86::IMULr32 : X86::IMULr16, 2, DestReg)
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.addReg(op0Reg).addReg(op1Reg);
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return;
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case cByte:
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// Must use the MUL instruction, which forces use of AL...
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BMI(MBB, MBBI, X86::MOVrr8, 1, X86::AL).addReg(op0Reg);
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BMI(MBB, MBBI, X86::MULr8, 1).addReg(op1Reg);
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BMI(MBB, MBBI, X86::MOVrr8, 1, DestReg).addReg(X86::AL);
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return;
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default:
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case cLong: assert(0 && "doMultiply cannot operate on LONG values!");
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case cByte:
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case cShort:
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case cInt: // Small integerals, handled below...
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break;
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}
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static const unsigned Regs[] ={ X86::AL , X86::AX , X86::EAX };
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static const unsigned MulOpcode[]={ X86::MULr8 , X86::MULr16 , X86::MULr32 };
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static const unsigned MovOpcode[]={ X86::MOVrr8, X86::MOVrr16, X86::MOVrr32 };
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unsigned Reg = Regs[Class];
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// Emit a MOV to put the first operand into the appropriately-sized
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// subreg of EAX.
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BMI(MBB, MBBI, MovOpcode[Class], 1, Reg).addReg(op0Reg);
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// Emit the appropriate multiply instruction.
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BMI(MBB, MBBI, MulOpcode[Class], 1).addReg(op1Reg);
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// Emit another MOV to put the result into the destination register.
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BMI(MBB, MBBI, MovOpcode[Class], 1, DestReg).addReg(Reg);
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}
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/// visitMul - Multiplies are not simple binary operators because they must deal
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@ -1069,8 +1069,6 @@ void ISel::emitSimpleBinaryOperation(MachineBasicBlock *BB,
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/// registers op0Reg and op1Reg, and put the result in DestReg. The type of the
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/// result should be given as DestTy.
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///
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/// FIXME: doMultiply should use one of the two address IMUL instructions!
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///
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void ISel::doMultiply(MachineBasicBlock *MBB, MachineBasicBlock::iterator &MBBI,
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unsigned DestReg, const Type *DestTy,
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unsigned op0Reg, unsigned op1Reg) {
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@ -1079,28 +1077,20 @@ void ISel::doMultiply(MachineBasicBlock *MBB, MachineBasicBlock::iterator &MBBI,
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case cFP: // Floating point multiply
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BMI(BB, MBBI, X86::FpMUL, 2, DestReg).addReg(op0Reg).addReg(op1Reg);
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return;
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case cInt:
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case cShort:
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BMI(BB, MBBI, Class == cInt ? X86::IMULr32 : X86::IMULr16, 2, DestReg)
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.addReg(op0Reg).addReg(op1Reg);
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return;
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case cByte:
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// Must use the MUL instruction, which forces use of AL...
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BMI(MBB, MBBI, X86::MOVrr8, 1, X86::AL).addReg(op0Reg);
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BMI(MBB, MBBI, X86::MULr8, 1).addReg(op1Reg);
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BMI(MBB, MBBI, X86::MOVrr8, 1, DestReg).addReg(X86::AL);
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return;
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default:
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case cLong: assert(0 && "doMultiply cannot operate on LONG values!");
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case cByte:
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case cShort:
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case cInt: // Small integerals, handled below...
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break;
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}
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static const unsigned Regs[] ={ X86::AL , X86::AX , X86::EAX };
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static const unsigned MulOpcode[]={ X86::MULr8 , X86::MULr16 , X86::MULr32 };
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static const unsigned MovOpcode[]={ X86::MOVrr8, X86::MOVrr16, X86::MOVrr32 };
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unsigned Reg = Regs[Class];
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// Emit a MOV to put the first operand into the appropriately-sized
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// subreg of EAX.
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BMI(MBB, MBBI, MovOpcode[Class], 1, Reg).addReg(op0Reg);
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// Emit the appropriate multiply instruction.
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BMI(MBB, MBBI, MulOpcode[Class], 1).addReg(op1Reg);
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// Emit another MOV to put the result into the destination register.
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BMI(MBB, MBBI, MovOpcode[Class], 1, DestReg).addReg(Reg);
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}
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/// visitMul - Multiplies are not simple binary operators because they must deal
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