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Fix SCEVExpander to handle loops with no preheader when LSR gives it a

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"phony" insertion point.

Fixes rdar://10619599: "SelectionDAGBuilder shouldn't visit PHI nodes!" assert


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147439 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Andrew Trick 2012-01-02 21:25:10 +00:00
parent cf6bd5a7c3
commit 0f8cd56bfd
2 changed files with 56 additions and 0 deletions
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6
lib/Analysis/ScalarEvolutionExpander.cpp
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@ -1443,6 +1443,12 @@ Value *SCEVExpander::expand(const SCEV *S) {
if (!L) break;
if (BasicBlock *Preheader = L->getLoopPreheader())
InsertPt = Preheader->getTerminator();
else {
// LSR sets the insertion point for AddRec start/step values to the
// block start to simplify value reuse, even though it's an invalid
// position. SCEVExpander must correct for this in all cases.
InsertPt = L->getHeader()->getFirstInsertionPt();
}
} else {
// If the SCEV is computable at this level, insert it into the header
// after the PHIs (and after any other instructions that we've inserted

50
test/Transforms/LoopStrengthReduce/2012-02-nopreheader.ll Normal file
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@ -0,0 +1,50 @@
; RUN: opt -loop-reduce -S < %s | FileCheck %s
;
; <rdar://10619599> "SelectionDAGBuilder shouldn't visit PHI nodes!" assert.
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128-f128:128:128-n8:16:32"
target triple = "i386-apple-darwin"
; LSR should convert the inner loop (bb7.us) IV (j.01.us) into float*.
; This involves a nested AddRec, the outer AddRec's loop invariant components
; cannot find a preheader, so they should be expanded in the loop header
; (bb7.lr.ph.us) below the existing phi i.12.us.
; CHECK: @nopreheader
; CHECK: bb7.lr.ph.us:
; CHECK: %lsr.iv = phi float*
; CHECK: bb7.us:
; CHECK: %lsr.iv2 = phi float*
define void @nopreheader(float* nocapture %a, i32 %n) nounwind {
entry:
%0 = sdiv i32 %n, undef
indirectbr i8* undef, [label %bb10.preheader]
bb10.preheader: ; preds = %bb4
indirectbr i8* undef, [label %bb8.preheader.lr.ph, label %return]
bb8.preheader.lr.ph: ; preds = %bb10.preheader
indirectbr i8* null, [label %bb7.lr.ph.us, label %bb9]
bb7.lr.ph.us: ; preds = %bb9.us, %bb8.preheader.lr.ph
%i.12.us = phi i32 [ %2, %bb9.us ], [ 0, %bb8.preheader.lr.ph ]
%tmp30 = mul i32 %0, %i.12.us
indirectbr i8* undef, [label %bb7.us]
bb7.us: ; preds = %bb7.lr.ph.us, %bb7.us
%j.01.us = phi i32 [ 0, %bb7.lr.ph.us ], [ %1, %bb7.us ]
%tmp31 = add i32 %tmp30, %j.01.us
%scevgep9 = getelementptr float* %a, i32 %tmp31
store float undef, float* %scevgep9, align 1
%1 = add nsw i32 %j.01.us, 1
indirectbr i8* undef, [label %bb9.us, label %bb7.us]
bb9.us: ; preds = %bb7.us
%2 = add nsw i32 %i.12.us, 1
indirectbr i8* undef, [label %bb7.lr.ph.us, label %return]
bb9: ; preds = %bb9, %bb8.preheader.lr.ph
indirectbr i8* undef, [label %bb9, label %return]
return: ; preds = %bb9, %bb9.us, %bb10.preheader
ret void
}