From 0f9d82c5c4c8149c86d13e2d3adab10f8ba9f948 Mon Sep 17 00:00:00 2001 From: Reid Spencer Date: Sun, 24 Dec 2006 00:40:59 +0000 Subject: [PATCH] For PR1066: Fix this by ensuring that a bitcast is inserted to do sign switching. This is only temporarily needed as the merging of signed and unsigned is next on the SignlessTypes plate. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32757 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Transforms/Scalar/InstructionCombining.cpp | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) diff --git a/lib/Transforms/Scalar/InstructionCombining.cpp b/lib/Transforms/Scalar/InstructionCombining.cpp index d0e74c1fa07..592e61d040a 100644 --- a/lib/Transforms/Scalar/InstructionCombining.cpp +++ b/lib/Transforms/Scalar/InstructionCombining.cpp @@ -2002,8 +2002,14 @@ Instruction *InstCombiner::visitSub(BinaryOperator &I) { if (CU->getZExtValue() == SI->getType()->getPrimitiveSizeInBits()-1) { // Ok, the transformation is safe. Insert AShr. - return new ShiftInst(Instruction::AShr, SI->getOperand(0), - CU, SI->getName()); + // FIXME: Once integer types are signless, this cast should be + // removed. + Value *ShiftOp = SI->getOperand(0); + if (ShiftOp->getType() != I.getType()) + ShiftOp = InsertCastBefore(Instruction::BitCast, ShiftOp, + I.getType(), I); + return new ShiftInst(Instruction::AShr, ShiftOp, CU, + SI->getName()); } } }