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Constrain register classes in TailDup.
When rewriting operands, make sure the new registers have a compatible register class. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157163 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -272,8 +272,8 @@ TailDuplicatePass::TailDuplicateAndUpdate(MachineBasicBlock *MBB,
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continue;
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unsigned Dst = Copy->getOperand(0).getReg();
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unsigned Src = Copy->getOperand(1).getReg();
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MachineRegisterInfo::use_iterator UI = MRI->use_begin(Src);
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if (++UI == MRI->use_end()) {
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if (MRI->hasOneNonDBGUse(Src) &&
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MRI->constrainRegClass(Src, MRI->getRegClass(Dst))) {
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// Copy is the only use. Do trivial copy propagation here.
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MRI->replaceRegWith(Dst, Src);
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Copy->eraseFromParent();
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@ -429,8 +429,10 @@ void TailDuplicatePass::DuplicateInstruction(MachineInstr *MI,
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AddSSAUpdateEntry(Reg, NewReg, PredBB);
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} else {
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DenseMap<unsigned, unsigned>::iterator VI = LocalVRMap.find(Reg);
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if (VI != LocalVRMap.end())
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if (VI != LocalVRMap.end()) {
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MO.setReg(VI->second);
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MRI->constrainRegClass(VI->second, MRI->getRegClass(Reg));
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}
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}
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}
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PredBB->insert(PredBB->instr_end(), NewMI);
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