From 0fe0405b52c62dac24085d1bdd3f23b0db4cbc05 Mon Sep 17 00:00:00 2001
From: Hao Liu <Hao.Liu@arm.com>
Date: Mon, 23 Dec 2013 02:42:10 +0000
Subject: [PATCH] [AArch64]The compare to zero intrinsics should be implemented
 by 'icmp/fcmp' and 'sext' not 'zext'. Modify the test cases.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197897 91177308-0d34-0410-b5e6-96231b3b80d8
---
 test/CodeGen/AArch64/neon-scalar-compare.ll    | 16 ++++++++--------
 test/CodeGen/AArch64/neon-scalar-fp-compare.ll |  2 +-
 2 files changed, 9 insertions(+), 9 deletions(-)

diff --git a/test/CodeGen/AArch64/neon-scalar-compare.ll b/test/CodeGen/AArch64/neon-scalar-compare.ll
index 5f10cbbab2a..d1b5f9c2546 100644
--- a/test/CodeGen/AArch64/neon-scalar-compare.ll
+++ b/test/CodeGen/AArch64/neon-scalar-compare.ll
@@ -271,7 +271,7 @@ define <1 x i64> @test_vceqz_s64(<1 x i64> %a) #0 {
 ; CHECK: test_vceqz_s64
 ; CHECK: cmeq {{d[0-9]}}, {{d[0-9]}}, #0x0
   %1 = icmp eq <1 x i64> %a, zeroinitializer
-  %vceqz.i = zext <1 x i1> %1 to <1 x i64>
+  %vceqz.i = sext <1 x i1> %1 to <1 x i64>
   ret <1 x i64> %vceqz.i
 }
 
@@ -279,7 +279,7 @@ define <1 x i64> @test_vceqz_u64(<1 x i64> %a) #0 {
 ; CHECK: test_vceqz_u64
 ; CHECK: cmeq {{d[0-9]}}, {{d[0-9]}}, #0x0
   %1 = icmp eq <1 x i64> %a, zeroinitializer
-  %vceqz.i = zext <1 x i1> %1 to <1 x i64>
+  %vceqz.i = sext <1 x i1> %1 to <1 x i64>
   ret <1 x i64> %vceqz.i
 }
 
@@ -287,7 +287,7 @@ define <1 x i64> @test_vceqz_p64(<1 x i64> %a) #0 {
 ; CHECK: test_vceqz_p64
 ; CHECK: cmeq {{d[0-9]}}, {{d[0-9]}}, #0x0
   %1 = icmp eq <1 x i64> %a, zeroinitializer
-  %vceqz.i = zext <1 x i1> %1 to <1 x i64>
+  %vceqz.i = sext <1 x i1> %1 to <1 x i64>
   ret <1 x i64> %vceqz.i
 }
 
@@ -295,7 +295,7 @@ define <2 x i64> @test_vceqzq_p64(<2 x i64> %a) #0 {
 ; CHECK: test_vceqzq_p64
 ; CHECK: cmeq  {{v[0-9]}}.2d, {{v[0-9]}}.2d, #0
   %1 = icmp eq <2 x i64> %a, zeroinitializer
-  %vceqz.i = zext <2 x i1> %1 to <2 x i64>
+  %vceqz.i = sext <2 x i1> %1 to <2 x i64>
   ret <2 x i64> %vceqz.i
 }
 
@@ -303,7 +303,7 @@ define <1 x i64> @test_vcgez_s64(<1 x i64> %a) #0 {
 ; CHECK: test_vcgez_s64
 ; CHECK: cmge {{d[0-9]}}, {{d[0-9]}}, #0x0
   %1 = icmp sge <1 x i64> %a, zeroinitializer
-  %vcgez.i = zext <1 x i1> %1 to <1 x i64>
+  %vcgez.i = sext <1 x i1> %1 to <1 x i64>
   ret <1 x i64> %vcgez.i
 }
 
@@ -311,7 +311,7 @@ define <1 x i64> @test_vclez_s64(<1 x i64> %a) #0 {
 ; CHECK: test_vclez_s64
 ; CHECK: cmle {{d[0-9]}}, {{d[0-9]}}, #0x0
   %1 = icmp sle <1 x i64> %a, zeroinitializer
-  %vclez.i = zext <1 x i1> %1 to <1 x i64>
+  %vclez.i = sext <1 x i1> %1 to <1 x i64>
   ret <1 x i64> %vclez.i
 }
 
@@ -319,7 +319,7 @@ define <1 x i64> @test_vcgtz_s64(<1 x i64> %a) #0 {
 ; CHECK: test_vcgtz_s64
 ; CHECK: cmgt {{d[0-9]}}, {{d[0-9]}}, #0x0
   %1 = icmp sgt <1 x i64> %a, zeroinitializer
-  %vcgtz.i = zext <1 x i1> %1 to <1 x i64>
+  %vcgtz.i = sext <1 x i1> %1 to <1 x i64>
   ret <1 x i64> %vcgtz.i
 }
 
@@ -327,7 +327,7 @@ define <1 x i64> @test_vcltz_s64(<1 x i64> %a) #0 {
 ; CHECK: test_vcltz_s64
 ; CHECK: cmlt {{d[0-9]}}, {{d[0-9]}}, #0
   %1 = icmp slt <1 x i64> %a, zeroinitializer
-  %vcltz.i = zext <1 x i1> %1 to <1 x i64>
+  %vcltz.i = sext <1 x i1> %1 to <1 x i64>
   ret <1 x i64> %vcltz.i
 }
 
diff --git a/test/CodeGen/AArch64/neon-scalar-fp-compare.ll b/test/CodeGen/AArch64/neon-scalar-fp-compare.ll
index 99a9a3a5e09..e0dce1336d8 100644
--- a/test/CodeGen/AArch64/neon-scalar-fp-compare.ll
+++ b/test/CodeGen/AArch64/neon-scalar-fp-compare.ll
@@ -25,7 +25,7 @@ define <1 x i64> @test_vceqz_f64(<1 x double> %a) {
 ; CHECK: fcmeq  {{d[0-9]+}}, {{d[0-9]+}}, #0.0
 entry:
   %0 = fcmp oeq <1 x double> %a, zeroinitializer
-  %vceqz.i = zext <1 x i1> %0 to <1 x i64>
+  %vceqz.i = sext <1 x i1> %0 to <1 x i64>
   ret <1 x i64> %vceqz.i
 }