mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2025-01-12 02:33:33 +00:00
Jim Asked us to move DataLayout on ARM back to the most specialized classes. Do
so and also change X86 for consistency. Investigating if this can be improved a bit. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115469 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
parent
cc07d7116a
commit
0febc4657b
@ -28,7 +28,6 @@ namespace llvm {
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// EMachine - This field is the target specific value to emit as the
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// EMachine - This field is the target specific value to emit as the
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// e_machine member of the ELF header.
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// e_machine member of the ELF header.
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unsigned short EMachine;
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unsigned short EMachine;
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TargetMachine &TM;
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bool is64Bit, isLittleEndian;
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bool is64Bit, isLittleEndian;
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public:
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public:
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@ -62,7 +61,7 @@ namespace llvm {
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ELFDATA2MSB = 2 // Big-endian object file
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ELFDATA2MSB = 2 // Big-endian object file
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};
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};
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explicit TargetELFWriterInfo(TargetMachine &tm);
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explicit TargetELFWriterInfo(bool is64Bit_, bool isLittleEndian_);
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virtual ~TargetELFWriterInfo();
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virtual ~TargetELFWriterInfo();
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unsigned short getEMachine() const { return EMachine; }
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unsigned short getEMachine() const { return EMachine; }
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@ -25,7 +25,8 @@ using namespace llvm;
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//===----------------------------------------------------------------------===//
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//===----------------------------------------------------------------------===//
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ARMELFWriterInfo::ARMELFWriterInfo(TargetMachine &TM)
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ARMELFWriterInfo::ARMELFWriterInfo(TargetMachine &TM)
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: TargetELFWriterInfo(TM) {
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: TargetELFWriterInfo(TM.getTargetData()->getPointerSizeInBits() == 64,
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TM.getTargetData()->isLittleEndian()) {
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// silently OK construction
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// silently OK construction
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}
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}
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@ -213,29 +213,6 @@ protected:
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/// GVIsIndirectSymbol - true if the GV will be accessed via an indirect
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/// GVIsIndirectSymbol - true if the GV will be accessed via an indirect
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/// symbol.
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/// symbol.
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bool GVIsIndirectSymbol(const GlobalValue *GV, Reloc::Model RelocM) const;
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bool GVIsIndirectSymbol(const GlobalValue *GV, Reloc::Model RelocM) const;
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/// getDataLayout() - returns the ARM/Thumb specific TargetLayout string
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std::string getDataLayout() const {
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if (isThumb()) {
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if (isAPCS_ABI()) {
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return std::string("e-p:32:32-f64:32:64-i64:32:64-"
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"i16:16:32-i8:8:32-i1:8:32-"
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"v128:32:128-v64:32:64-a:0:32-n32");
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} else {
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return std::string("e-p:32:32-f64:64:64-i64:64:64-"
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"i16:16:32-i8:8:32-i1:8:32-"
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"v128:64:128-v64:64:64-a:0:32-n32");
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}
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} else {
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if (isAPCS_ABI()) {
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return std::string("e-p:32:32-f64:32:64-i64:32:64-"
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"v128:32:128-v64:32:64-n32");
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} else {
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return std::string("e-p:32:32-f64:64:64-i64:64:64-"
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"v128:64:128-v64:64:64-n32");
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}
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}
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}
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};
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};
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} // End llvm namespace
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} // End llvm namespace
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@ -91,17 +91,20 @@ ARMBaseTargetMachine::ARMBaseTargetMachine(const Target &T,
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Subtarget(TT, FS, isThumb),
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Subtarget(TT, FS, isThumb),
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FrameInfo(Subtarget),
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FrameInfo(Subtarget),
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JITInfo(),
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JITInfo(),
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InstrItins(Subtarget.getInstrItineraryData()),
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InstrItins(Subtarget.getInstrItineraryData())
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DataLayout(Subtarget.getDataLayout()),
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ELFWriterInfo(*this)
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{
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{
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DefRelocModel = getRelocationModel();
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DefRelocModel = getRelocationModel();
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}
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}
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ARMTargetMachine::ARMTargetMachine(const Target &T, const std::string &TT,
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ARMTargetMachine::ARMTargetMachine(const Target &T, const std::string &TT,
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const std::string &FS)
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const std::string &FS)
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: ARMBaseTargetMachine(T, TT, FS, false),
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: ARMBaseTargetMachine(T, TT, FS, false), InstrInfo(Subtarget),
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InstrInfo(Subtarget),
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DataLayout(Subtarget.isAPCS_ABI() ?
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std::string("e-p:32:32-f64:32:64-i64:32:64-"
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"v128:32:128-v64:32:64-n32") :
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std::string("e-p:32:32-f64:64:64-i64:64:64-"
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"v128:64:128-v64:64:64-n32")),
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ELFWriterInfo(*this),
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TLInfo(*this),
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TLInfo(*this),
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TSInfo(*this) {
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TSInfo(*this) {
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if (!Subtarget.hasARMOps())
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if (!Subtarget.hasARMOps())
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@ -115,6 +118,14 @@ ThumbTargetMachine::ThumbTargetMachine(const Target &T, const std::string &TT,
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InstrInfo(Subtarget.hasThumb2()
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InstrInfo(Subtarget.hasThumb2()
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? ((ARMBaseInstrInfo*)new Thumb2InstrInfo(Subtarget))
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? ((ARMBaseInstrInfo*)new Thumb2InstrInfo(Subtarget))
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: ((ARMBaseInstrInfo*)new Thumb1InstrInfo(Subtarget))),
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: ((ARMBaseInstrInfo*)new Thumb1InstrInfo(Subtarget))),
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DataLayout(Subtarget.isAPCS_ABI() ?
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std::string("e-p:32:32-f64:32:64-i64:32:64-"
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"i16:16:32-i8:8:32-i1:8:32-"
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"v128:32:128-v64:32:64-a:0:32-n32") :
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std::string("e-p:32:32-f64:64:64-i64:64:64-"
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"i16:16:32-i8:8:32-i1:8:32-"
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"v128:64:128-v64:64:64-a:0:32-n32")),
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ELFWriterInfo(*this),
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TLInfo(*this),
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TLInfo(*this),
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TSInfo(*this) {
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TSInfo(*this) {
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}
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}
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@ -40,19 +40,10 @@ private:
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InstrItineraryData InstrItins;
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InstrItineraryData InstrItins;
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Reloc::Model DefRelocModel; // Reloc model before it's overridden.
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Reloc::Model DefRelocModel; // Reloc model before it's overridden.
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protected:
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const TargetData DataLayout; // Calculates type size & alignment
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ARMELFWriterInfo ELFWriterInfo;
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public:
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public:
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ARMBaseTargetMachine(const Target &T, const std::string &TT,
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ARMBaseTargetMachine(const Target &T, const std::string &TT,
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const std::string &FS, bool isThumb);
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const std::string &FS, bool isThumb);
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virtual const TargetData *getTargetData() const { return &DataLayout; }
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virtual const ARMELFWriterInfo *getELFWriterInfo() const {
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return Subtarget.isTargetELF() ? &ELFWriterInfo : 0;
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}
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virtual const ARMFrameInfo *getFrameInfo() const { return &FrameInfo; }
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virtual const ARMFrameInfo *getFrameInfo() const { return &FrameInfo; }
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virtual ARMJITInfo *getJITInfo() { return &JITInfo; }
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virtual ARMJITInfo *getJITInfo() { return &JITInfo; }
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virtual const ARMSubtarget *getSubtargetImpl() const { return &Subtarget; }
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virtual const ARMSubtarget *getSubtargetImpl() const { return &Subtarget; }
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@ -74,6 +65,8 @@ public:
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///
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///
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class ARMTargetMachine : public ARMBaseTargetMachine {
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class ARMTargetMachine : public ARMBaseTargetMachine {
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ARMInstrInfo InstrInfo;
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ARMInstrInfo InstrInfo;
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const TargetData DataLayout; // Calculates type size & alignment
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ARMELFWriterInfo ELFWriterInfo;
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ARMTargetLowering TLInfo;
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ARMTargetLowering TLInfo;
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ARMSelectionDAGInfo TSInfo;
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ARMSelectionDAGInfo TSInfo;
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public:
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public:
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@ -94,6 +87,9 @@ public:
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virtual const ARMInstrInfo *getInstrInfo() const { return &InstrInfo; }
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virtual const ARMInstrInfo *getInstrInfo() const { return &InstrInfo; }
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virtual const TargetData *getTargetData() const { return &DataLayout; }
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virtual const TargetData *getTargetData() const { return &DataLayout; }
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virtual const ARMELFWriterInfo *getELFWriterInfo() const {
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return Subtarget.isTargetELF() ? &ELFWriterInfo : 0;
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}
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};
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};
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/// ThumbTargetMachine - Thumb target machine.
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/// ThumbTargetMachine - Thumb target machine.
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@ -103,6 +99,8 @@ public:
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class ThumbTargetMachine : public ARMBaseTargetMachine {
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class ThumbTargetMachine : public ARMBaseTargetMachine {
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// Either Thumb1InstrInfo or Thumb2InstrInfo.
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// Either Thumb1InstrInfo or Thumb2InstrInfo.
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OwningPtr<ARMBaseInstrInfo> InstrInfo;
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OwningPtr<ARMBaseInstrInfo> InstrInfo;
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const TargetData DataLayout; // Calculates type size & alignment
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ARMELFWriterInfo ELFWriterInfo;
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ARMTargetLowering TLInfo;
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ARMTargetLowering TLInfo;
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ARMSelectionDAGInfo TSInfo;
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ARMSelectionDAGInfo TSInfo;
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public:
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public:
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@ -127,6 +125,9 @@ public:
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return InstrInfo.get();
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return InstrInfo.get();
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}
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}
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virtual const TargetData *getTargetData() const { return &DataLayout; }
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virtual const TargetData *getTargetData() const { return &DataLayout; }
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virtual const ARMELFWriterInfo *getELFWriterInfo() const {
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return Subtarget.isTargetELF() ? &ELFWriterInfo : 0;
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}
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};
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};
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} // end namespace llvm
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} // end namespace llvm
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@ -17,9 +17,8 @@
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#include "llvm/Target/TargetMachine.h"
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#include "llvm/Target/TargetMachine.h"
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using namespace llvm;
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using namespace llvm;
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TargetELFWriterInfo::TargetELFWriterInfo(TargetMachine &tm) : TM(tm) {
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TargetELFWriterInfo::TargetELFWriterInfo(bool is64Bit_, bool isLittleEndian_) :
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is64Bit = TM.getTargetData()->getPointerSizeInBits() == 64;
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is64Bit(is64Bit_), isLittleEndian(isLittleEndian_) {
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isLittleEndian = TM.getTargetData()->isLittleEndian();
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}
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}
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TargetELFWriterInfo::~TargetELFWriterInfo() {}
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TargetELFWriterInfo::~TargetELFWriterInfo() {}
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// Implementation of the X86ELFWriterInfo class
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// Implementation of the X86ELFWriterInfo class
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//===----------------------------------------------------------------------===//
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//===----------------------------------------------------------------------===//
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X86ELFWriterInfo::X86ELFWriterInfo(TargetMachine &TM)
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X86ELFWriterInfo::X86ELFWriterInfo(bool is64Bit_, bool isLittleEndian_)
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: TargetELFWriterInfo(TM) {
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: TargetELFWriterInfo(is64Bit_, isLittleEndian_) {
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EMachine = is64Bit ? EM_X86_64 : EM_386;
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EMachine = is64Bit ? EM_X86_64 : EM_386;
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}
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}
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@ -38,7 +38,7 @@ namespace llvm {
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};
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};
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public:
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public:
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X86ELFWriterInfo(TargetMachine &TM);
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X86ELFWriterInfo(bool is64Bit_, bool isLittleEndian_);
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virtual ~X86ELFWriterInfo();
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virtual ~X86ELFWriterInfo();
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/// getRelocationType - Returns the target specific ELF Relocation type.
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/// getRelocationType - Returns the target specific ELF Relocation type.
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@ -190,20 +190,6 @@ public:
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return !Is64Bit && (isTargetMingw() || isTargetWindows());
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return !Is64Bit && (isTargetMingw() || isTargetWindows());
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}
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}
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std::string getDataLayout() const {
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const char *p;
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if (is64Bit())
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p = "e-p:64:64-s:64-f64:64:64-i64:64:64-f80:128:128-n8:16:32:64";
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else if (isTargetDarwin())
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p = "e-p:32:32-f64:32:64-i64:32:64-f80:128:128-n8:16:32";
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else if (isTargetCygMing() || isTargetWindows())
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p = "e-p:32:32-f64:64:64-i64:64:64-f80:32:32-n8:16:32";
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else
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p = "e-p:32:32-f64:32:64-i64:32:64-f80:32:32-n8:16:32";
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return std::string(p);
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}
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bool isPICStyleSet() const { return PICStyle != PICStyles::None; }
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bool isPICStyleSet() const { return PICStyle != PICStyles::None; }
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bool isPICStyleGOT() const { return PICStyle == PICStyles::GOT; }
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bool isPICStyleGOT() const { return PICStyle == PICStyles::GOT; }
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bool isPICStyleRIPRel() const { return PICStyle == PICStyles::RIPRel; }
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bool isPICStyleRIPRel() const { return PICStyle == PICStyles::RIPRel; }
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@ -89,13 +89,28 @@ extern "C" void LLVMInitializeX86Target() {
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X86_32TargetMachine::X86_32TargetMachine(const Target &T, const std::string &TT,
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X86_32TargetMachine::X86_32TargetMachine(const Target &T, const std::string &TT,
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const std::string &FS)
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const std::string &FS)
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: X86TargetMachine(T, TT, FS, false) {
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: X86TargetMachine(T, TT, FS, false),
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DataLayout(getSubtargetImpl()->isTargetDarwin() ?
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"e-p:32:32-f64:32:64-i64:32:64-f80:128:128-n8:16:32" :
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(getSubtargetImpl()->isTargetCygMing() ||
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getSubtargetImpl()->isTargetWindows()) ?
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"e-p:32:32-f64:64:64-i64:64:64-f80:32:32-n8:16:32" :
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"e-p:32:32-f64:32:64-i64:32:64-f80:32:32-n8:16:32"),
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InstrInfo(*this),
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TSInfo(*this),
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TLInfo(*this),
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JITInfo(*this) {
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}
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}
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X86_64TargetMachine::X86_64TargetMachine(const Target &T, const std::string &TT,
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X86_64TargetMachine::X86_64TargetMachine(const Target &T, const std::string &TT,
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const std::string &FS)
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const std::string &FS)
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: X86TargetMachine(T, TT, FS, true) {
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: X86TargetMachine(T, TT, FS, true),
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DataLayout("e-p:64:64-s:64-f64:64:64-i64:64:64-f80:128:128-n8:16:32:64"),
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InstrInfo(*this),
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TSInfo(*this),
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TLInfo(*this),
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JITInfo(*this) {
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}
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}
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/// X86TargetMachine ctor - Create an X86 target.
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/// X86TargetMachine ctor - Create an X86 target.
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@ -104,13 +119,11 @@ X86TargetMachine::X86TargetMachine(const Target &T, const std::string &TT,
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const std::string &FS, bool is64Bit)
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const std::string &FS, bool is64Bit)
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: LLVMTargetMachine(T, TT),
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: LLVMTargetMachine(T, TT),
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Subtarget(TT, FS, is64Bit),
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Subtarget(TT, FS, is64Bit),
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DataLayout(Subtarget.getDataLayout()),
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FrameInfo(TargetFrameInfo::StackGrowsDown,
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FrameInfo(TargetFrameInfo::StackGrowsDown,
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Subtarget.getStackAlignment(),
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Subtarget.getStackAlignment(),
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(Subtarget.isTargetWin64() ? -40 :
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(Subtarget.isTargetWin64() ? -40 :
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(Subtarget.is64Bit() ? -8 : -4))),
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(Subtarget.is64Bit() ? -8 : -4))),
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InstrInfo(*this), JITInfo(*this), TLInfo(*this), TSInfo(*this),
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ELFWriterInfo(is64Bit, true) {
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ELFWriterInfo(*this) {
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DefRelocModel = getRelocationModel();
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DefRelocModel = getRelocationModel();
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// If no relocation model was picked, default as appropriate for the target.
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// If no relocation model was picked, default as appropriate for the target.
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@ -31,12 +31,7 @@ class formatted_raw_ostream;
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class X86TargetMachine : public LLVMTargetMachine {
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class X86TargetMachine : public LLVMTargetMachine {
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X86Subtarget Subtarget;
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X86Subtarget Subtarget;
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const TargetData DataLayout; // Calculates type size & alignment
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TargetFrameInfo FrameInfo;
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TargetFrameInfo FrameInfo;
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X86InstrInfo InstrInfo;
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X86JITInfo JITInfo;
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X86TargetLowering TLInfo;
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X86SelectionDAGInfo TSInfo;
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X86ELFWriterInfo ELFWriterInfo;
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X86ELFWriterInfo ELFWriterInfo;
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Reloc::Model DefRelocModel; // Reloc model before it's overridden.
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Reloc::Model DefRelocModel; // Reloc model before it's overridden.
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@ -49,20 +44,23 @@ public:
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X86TargetMachine(const Target &T, const std::string &TT,
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X86TargetMachine(const Target &T, const std::string &TT,
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const std::string &FS, bool is64Bit);
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const std::string &FS, bool is64Bit);
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virtual const X86InstrInfo *getInstrInfo() const { return &InstrInfo; }
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virtual const X86InstrInfo *getInstrInfo() const {
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llvm_unreachable("getInstrInfo not implemented");
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}
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virtual const TargetFrameInfo *getFrameInfo() const { return &FrameInfo; }
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virtual const TargetFrameInfo *getFrameInfo() const { return &FrameInfo; }
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virtual X86JITInfo *getJITInfo() { return &JITInfo; }
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virtual X86JITInfo *getJITInfo() {
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llvm_unreachable("getJITInfo not implemented");
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}
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virtual const X86Subtarget *getSubtargetImpl() const{ return &Subtarget; }
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virtual const X86Subtarget *getSubtargetImpl() const{ return &Subtarget; }
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virtual const X86TargetLowering *getTargetLowering() const {
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virtual const X86TargetLowering *getTargetLowering() const {
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return &TLInfo;
|
llvm_unreachable("getTargetLowering not implemented");
|
||||||
}
|
}
|
||||||
virtual const X86SelectionDAGInfo *getSelectionDAGInfo() const {
|
virtual const X86SelectionDAGInfo *getSelectionDAGInfo() const {
|
||||||
return &TSInfo;
|
llvm_unreachable("getSelectionDAGInfo not implemented");
|
||||||
}
|
}
|
||||||
virtual const X86RegisterInfo *getRegisterInfo() const {
|
virtual const X86RegisterInfo *getRegisterInfo() const {
|
||||||
return &InstrInfo.getRegisterInfo();
|
return &getInstrInfo()->getRegisterInfo();
|
||||||
}
|
}
|
||||||
virtual const TargetData *getTargetData() const { return &DataLayout; }
|
|
||||||
virtual const X86ELFWriterInfo *getELFWriterInfo() const {
|
virtual const X86ELFWriterInfo *getELFWriterInfo() const {
|
||||||
return Subtarget.isTargetELF() ? &ELFWriterInfo : 0;
|
return Subtarget.isTargetELF() ? &ELFWriterInfo : 0;
|
||||||
}
|
}
|
||||||
@ -79,17 +77,53 @@ public:
|
|||||||
/// X86_32TargetMachine - X86 32-bit target machine.
|
/// X86_32TargetMachine - X86 32-bit target machine.
|
||||||
///
|
///
|
||||||
class X86_32TargetMachine : public X86TargetMachine {
|
class X86_32TargetMachine : public X86TargetMachine {
|
||||||
|
const TargetData DataLayout; // Calculates type size & alignment
|
||||||
|
X86InstrInfo InstrInfo;
|
||||||
|
X86SelectionDAGInfo TSInfo;
|
||||||
|
X86TargetLowering TLInfo;
|
||||||
|
X86JITInfo JITInfo;
|
||||||
public:
|
public:
|
||||||
X86_32TargetMachine(const Target &T, const std::string &M,
|
X86_32TargetMachine(const Target &T, const std::string &M,
|
||||||
const std::string &FS);
|
const std::string &FS);
|
||||||
|
virtual const TargetData *getTargetData() const { return &DataLayout; }
|
||||||
|
virtual const X86TargetLowering *getTargetLowering() const {
|
||||||
|
return &TLInfo;
|
||||||
|
}
|
||||||
|
virtual const X86SelectionDAGInfo *getSelectionDAGInfo() const {
|
||||||
|
return &TSInfo;
|
||||||
|
}
|
||||||
|
virtual const X86InstrInfo *getInstrInfo() const {
|
||||||
|
return &InstrInfo;
|
||||||
|
}
|
||||||
|
virtual X86JITInfo *getJITInfo() {
|
||||||
|
return &JITInfo;
|
||||||
|
}
|
||||||
};
|
};
|
||||||
|
|
||||||
/// X86_64TargetMachine - X86 64-bit target machine.
|
/// X86_64TargetMachine - X86 64-bit target machine.
|
||||||
///
|
///
|
||||||
class X86_64TargetMachine : public X86TargetMachine {
|
class X86_64TargetMachine : public X86TargetMachine {
|
||||||
|
const TargetData DataLayout; // Calculates type size & alignment
|
||||||
|
X86InstrInfo InstrInfo;
|
||||||
|
X86SelectionDAGInfo TSInfo;
|
||||||
|
X86TargetLowering TLInfo;
|
||||||
|
X86JITInfo JITInfo;
|
||||||
public:
|
public:
|
||||||
X86_64TargetMachine(const Target &T, const std::string &TT,
|
X86_64TargetMachine(const Target &T, const std::string &TT,
|
||||||
const std::string &FS);
|
const std::string &FS);
|
||||||
|
virtual const TargetData *getTargetData() const { return &DataLayout; }
|
||||||
|
virtual const X86TargetLowering *getTargetLowering() const {
|
||||||
|
return &TLInfo;
|
||||||
|
}
|
||||||
|
virtual const X86SelectionDAGInfo *getSelectionDAGInfo() const {
|
||||||
|
return &TSInfo;
|
||||||
|
}
|
||||||
|
virtual const X86InstrInfo *getInstrInfo() const {
|
||||||
|
return &InstrInfo;
|
||||||
|
}
|
||||||
|
virtual X86JITInfo *getJITInfo() {
|
||||||
|
return &JITInfo;
|
||||||
|
}
|
||||||
};
|
};
|
||||||
|
|
||||||
} // End llvm namespace
|
} // End llvm namespace
|
||||||
|
Loading…
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Reference in New Issue
Block a user