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- Change MachineInstr::findRegisterDefOperandIdx so it can also look for defs
that are aliases of the specified register. - Rename modifiesRegister to definesRegister since it's looking a def of the specific register or one of its super-registers. It's not looking for def of a sub-register or alias that could change the specified register. - Added modifiesRegister to look for defs of aliases. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104377 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -562,7 +562,7 @@ void LiveIntervals::handlePhysicalRegisterDef(MachineBasicBlock *MBB,
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end = baseIndex.getDefIndex();
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goto exit;
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} else {
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int DefIdx = mi->findRegisterDefOperandIdx(interval.reg, false, tri_);
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int DefIdx = mi->findRegisterDefOperandIdx(interval.reg,false,false,tri_);
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if (DefIdx != -1) {
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if (mi->isRegTiedToUseOperand(DefIdx)) {
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// Two-address instruction.
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@ -624,7 +624,7 @@ void LiveIntervals::handleRegisterDef(MachineBasicBlock *MBB,
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for (const unsigned* AS = tri_->getSubRegisters(MO.getReg()); *AS; ++AS)
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// If MI also modifies the sub-register explicitly, avoid processing it
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// more than once. Do not pass in TRI here so it checks for exact match.
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if (!MI->modifiesRegister(*AS))
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if (!MI->definesRegister(*AS))
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handlePhysicalRegisterDef(MBB, MI, MIIdx, MO,
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getOrCreateInterval(*AS), 0);
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}
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@ -665,7 +665,7 @@ void LiveIntervals::handleLiveInRegister(MachineBasicBlock *MBB,
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end = baseIndex.getDefIndex();
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SeenDefUse = true;
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break;
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} else if (mi->modifiesRegister(interval.reg, tri_)) {
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} else if (mi->definesRegister(interval.reg, tri_)) {
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// Another instruction redefines the register before it is ever read.
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// Then the register is essentially dead at the instruction that defines
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// it. Hence its interval is:
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