diff --git a/lib/CodeGen/MachineFunction.cpp b/lib/CodeGen/MachineFunction.cpp index f18fb148b2e..3dcbabc2a68 100644 --- a/lib/CodeGen/MachineFunction.cpp +++ b/lib/CodeGen/MachineFunction.cpp @@ -61,6 +61,19 @@ namespace { return false; } }; + + struct Printer : public FunctionPass { + const char *getPassName() const { return "MachineFunction Printer"; } + + virtual void getAnalysisUsage(AnalysisUsage &AU) const { + AU.setPreservesAll(); + } + + bool runOnFunction(Function &F) { + MachineFunction::get(&F).dump(); + return false; + } + }; } Pass *createMachineCodeConstructionPass(TargetMachine &Target) { @@ -71,11 +84,44 @@ Pass *createMachineCodeDestructionPass() { return new DestroyMachineFunction(); } +Pass *createMachineFunctionPrinterPass() { + return new Printer(); +} + //===---------------------------------------------------------------------===// // MachineFunction implementation //===---------------------------------------------------------------------===// +MachineFunction::MachineFunction(const Function *F, + const TargetMachine& target) + : Annotation(MF_AID), + Fn(F), Target(target), staticStackSize(0), + automaticVarsSize(0), regSpillsSize(0), + maxOptionalArgsSize(0), maxOptionalNumArgs(0), + currentTmpValuesSize(0), maxTmpValuesSize(0), compiledAsLeaf(false), + spillsAreaFrozen(false), automaticVarsAreaFrozen(false) +{ +} + +void MachineFunction::dump() const { print(std::cerr); } + +void MachineFunction::print(std::ostream &OS) const { + OS << "\n" << *(Value*)Fn->getReturnType() << " \"" << Fn->getName()<< "\"\n"; + + for (const_iterator BB = begin(); BB != end(); ++BB) { + BasicBlock *LBB = BB->getBasicBlock(); + OS << "\n" << LBB->getName() << " (" + << (const void*)BB->getBasicBlock() << "):\n"; + for (MachineBasicBlock::const_iterator I = BB->begin(); I != BB->end();++I){ + OS << "\t"; + (*I)->print(OS, Target); + } + } + OS << "\nEnd function \"" << Fn->getName() << "\"\n\n"; +} + + // The next two methods are used to construct and to retrieve // the MachineCodeForFunction object for the given function. // construct() -- Allocates and initializes for a given function and target @@ -173,17 +219,6 @@ SizeToAlignment(unsigned int size, const TargetMachine& target) } -MachineFunction::MachineFunction(const Function *F, - const TargetMachine& target) - : Annotation(MF_AID), - Fn(F), Target(target), staticStackSize(0), - automaticVarsSize(0), regSpillsSize(0), - maxOptionalArgsSize(0), maxOptionalNumArgs(0), - currentTmpValuesSize(0), maxTmpValuesSize(0), compiledAsLeaf(false), - spillsAreaFrozen(false), automaticVarsAreaFrozen(false) -{ -} - void MachineFunction::CalculateArgSize() { maxOptionalArgsSize = ComputeMaxOptionalArgsSize(Target, Fn, maxOptionalNumArgs); @@ -292,18 +327,3 @@ MachineFunction::getOffset(const Value* val) const hash_map::const_iterator pair = offsets.find(val); return (pair == offsets.end()) ? INVALID_FRAME_OFFSET : pair->second; } - -void -MachineFunction::dump() const -{ - std::cerr << "\n" << Fn->getReturnType() - << " \"" << Fn->getName() << "\"\n"; - - for (const_iterator BB = begin(); BB != end(); ++BB) { - std::cerr << "\n" << BB->getBasicBlock()->getName() << " (" - << (const void*)BB->getBasicBlock() << ")" << ":" << "\n"; - for (MachineBasicBlock::const_iterator I = BB->begin(); I != BB->end(); ++I) - std::cerr << "\t" << *I; - } - std::cerr << "\nEnd function \"" << Fn->getName() << "\"\n\n"; -} diff --git a/lib/CodeGen/MachineInstr.cpp b/lib/CodeGen/MachineInstr.cpp index 605fe16c9b1..1fde26a1b06 100644 --- a/lib/CodeGen/MachineInstr.cpp +++ b/lib/CodeGen/MachineInstr.cpp @@ -6,6 +6,7 @@ #include "llvm/CodeGen/MachineBasicBlock.h" #include "llvm/Value.h" #include "llvm/Target/MachineInstrInfo.h" // FIXME: shouldn't need this! +#include "llvm/Target/TargetMachine.h" using std::cerr; // Global variable holding an array of descriptors for machine instructions. @@ -196,6 +197,96 @@ OutputReg(std::ostream &os, unsigned int regNum) return os << "%mreg(" << regNum << ")"; } +static void print(const MachineOperand &MO, std::ostream &OS, + const TargetMachine &TM) { + bool CloseParen = true; + if (MO.opHiBits32()) + OS << "%lm("; + else if (MO.opLoBits32()) + OS << "%lo("; + else if (MO.opHiBits64()) + OS << "%hh("; + else if (MO.opLoBits64()) + OS << "%hm("; + else + CloseParen = false; + + switch (MO.getType()) { + case MachineOperand::MO_VirtualRegister: + if (MO.getVRegValue()) { + OS << "%reg"; + OutputValue(OS, MO.getVRegValue()); + if (MO.hasAllocatedReg()) + OS << "=="; + } + if (MO.hasAllocatedReg()) + OutputReg(OS, MO.getAllocatedRegNum()); + break; + case MachineOperand::MO_CCRegister: + OS << "%ccreg"; + OutputValue(OS, MO.getVRegValue()); + if (MO.hasAllocatedReg()) { + OS << "=="; + OutputReg(OS, MO.getAllocatedRegNum()); + } + break; + case MachineOperand::MO_MachineRegister: + OutputReg(OS, MO.getMachineRegNum()); + break; + case MachineOperand::MO_SignExtendedImmed: + OS << (long)MO.getImmedValue(); + break; + case MachineOperand::MO_UnextendedImmed: + OS << (long)MO.getImmedValue(); + break; + case MachineOperand::MO_PCRelativeDisp: { + const Value* opVal = MO.getVRegValue(); + bool isLabel = isa(opVal) || isa(opVal); + OS << "%disp(" << (isLabel? "label " : "addr-of-val "); + if (opVal->hasName()) + OS << opVal->getName(); + else + OS << (const void*) opVal; + OS << ")"; + break; + } + default: + assert(0 && "Unrecognized operand type"); + } + + if (CloseParen) + OS << ")"; +} + +void MachineInstr::print(std::ostream &OS, const TargetMachine &TM) { + OS << TM.getInstrInfo().getName(getOpcode()); + for (unsigned i = 0, e = getNumOperands(); i != e; ++i) { + OS << "\t"; + ::print(getOperand(i), OS, TM); + + if (operandIsDefinedAndUsed(i)) + OS << ""; + else if (operandIsDefined(i)) + OS << ""; + } + + // code for printing implict references + if (getNumImplicitRefs()) { + OS << "\tImplicitRefs: "; + for(unsigned i = 0, e = getNumImplicitRefs(); i != e; ++i) { + OS << "\t"; + OutputValue(OS, getImplicitRef(i)); + if (implicitRefIsDefinedAndUsed(i)) + OS << ""; + else if (implicitRefIsDefined(i)) + OS << ""; + } + } + + OS << "\n"; +} + + std::ostream &operator<<(std::ostream& os, const MachineInstr& minstr) { os << TargetInstrDescriptors[minstr.opCode].Name; @@ -234,28 +325,32 @@ std::ostream &operator<<(std::ostream &os, const MachineOperand &mop) else if (mop.opLoBits64()) os << "%hm("; - switch(mop.opType) + switch (mop.getType()) { case MachineOperand::MO_VirtualRegister: os << "%reg"; OutputValue(os, mop.getVRegValue()); - if (mop.hasAllocatedReg()) - os << "==" << OutputReg(os, mop.getAllocatedRegNum()); + if (mop.hasAllocatedReg()) { + os << "=="; + OutputReg(os, mop.getAllocatedRegNum()); + } break; case MachineOperand::MO_CCRegister: os << "%ccreg"; OutputValue(os, mop.getVRegValue()); - if (mop.hasAllocatedReg()) - os << "==" << OutputReg(os, mop.getAllocatedRegNum()); + if (mop.hasAllocatedReg()) { + os << "=="; + OutputReg(os, mop.getAllocatedRegNum()); + } break; case MachineOperand::MO_MachineRegister: OutputReg(os, mop.getMachineRegNum()); break; case MachineOperand::MO_SignExtendedImmed: - os << (long)mop.immedVal; + os << (long)mop.getImmedValue(); break; case MachineOperand::MO_UnextendedImmed: - os << (long)mop.immedVal; + os << (long)mop.getImmedValue(); break; case MachineOperand::MO_PCRelativeDisp: {