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Do trivial local CSE for constants and other non-Instruction values
in FastISel. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55748 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -36,6 +36,7 @@ class TargetRegisterClass;
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class FastISel {
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protected:
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MachineBasicBlock *MBB;
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DenseMap<const Value *, unsigned> LocalValueMap;
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DenseMap<const Value *, unsigned> &ValueMap;
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DenseMap<const BasicBlock *, MachineBasicBlock *> &MBBMap;
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MachineFunction &MF;
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@ -21,13 +21,16 @@
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#include "llvm/Target/TargetMachine.h"
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using namespace llvm;
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// Don't cache constant materializations. To do so would require
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// tracking what uses they dominate. Non-constants, however, already
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// have the SSA def-doms-use requirement enforced, so we can cache their
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// computations.
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unsigned FastISel::getRegForValue(Value *V) {
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// Look up the value to see if we already have a register for it. We
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// cache values defined by Instructions across blocks, and other values
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// only locally. This is because Instructions already have the SSA
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// def-dominatess-use requirement enforced.
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if (ValueMap.count(V))
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return ValueMap[V];
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unsigned Reg = LocalValueMap[V];
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if (Reg != 0)
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return Reg;
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MVT::SimpleValueType VT = TLI.getValueType(V->getType()).getSimpleVT();
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if (ConstantInt *CI = dyn_cast<ConstantInt>(V)) {
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@ -35,11 +38,11 @@ unsigned FastISel::getRegForValue(Value *V) {
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return 0;
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// Don't cache constant materializations. To do so would require
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// tracking what uses they dominate.
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return FastEmit_i(VT, VT, ISD::Constant, CI->getZExtValue());
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Reg = FastEmit_i(VT, VT, ISD::Constant, CI->getZExtValue());
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} else if (isa<ConstantPointerNull>(V)) {
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return FastEmit_i(VT, VT, ISD::Constant, 0);
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Reg = FastEmit_i(VT, VT, ISD::Constant, 0);
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} else if (ConstantFP *CF = dyn_cast<ConstantFP>(V)) {
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unsigned Reg = FastEmit_f(VT, VT, ISD::ConstantFP, CF);
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Reg = FastEmit_f(VT, VT, ISD::ConstantFP, CF);
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if (!Reg) {
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const APFloat &Flt = CF->getValueAPF();
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@ -60,15 +63,15 @@ unsigned FastISel::getRegForValue(Value *V) {
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if (Reg == 0)
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return 0;
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}
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return Reg;
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} else if (isa<UndefValue>(V)) {
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unsigned Reg = createResultReg(TLI.getRegClassFor(VT));
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Reg = createResultReg(TLI.getRegClassFor(VT));
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BuildMI(MBB, TII.get(TargetInstrInfo::IMPLICIT_DEF), Reg);
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return Reg;
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} else {
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return 0;
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}
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return 0;
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LocalValueMap[V] = Reg;
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return Reg;
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}
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/// UpdateValueMap - Update the value map to include the new mapping for this
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