diff --git a/lib/Target/Sparc/Makefile b/lib/Target/Sparc/Makefile index 78da738aa7b..2c9e3413bfe 100644 --- a/lib/Target/Sparc/Makefile +++ b/lib/Target/Sparc/Makefile @@ -16,7 +16,7 @@ TDFILE := $(SourceDir)/SparcV8.td # Make sure that tblgen is run, first thing. $(SourceDepend): SparcV8GenRegisterInfo.h.inc SparcV8GenRegisterNames.inc \ SparcV8GenRegisterInfo.inc SparcV8GenInstrNames.inc \ - SparcV8GenInstrInfo.inc SparcV8GenInstrSelector.inc + SparcV8GenInstrInfo.inc SparcV8GenRegisterNames.inc:: $(TDFILES) $(TBLGEN) @echo "Building SparcV8.td register names with tblgen" @@ -38,9 +38,5 @@ SparcV8GenInstrInfo.inc:: $(TDFILES) $(TBLGEN) @echo "Building SparcV8.td instruction information with tblgen" $(VERB) $(TBLGEN) -I $(BUILD_SRC_DIR) $(TDFILE) -gen-instr-desc -o $@ -SparcV8GenInstrSelector.inc:: $(TDFILES) $(TBLGEN) - @echo "Building SparcV8.td instruction selector with tblgen" - $(VERB) $(TBLGEN) -I $(BUILD_SRC_DIR) $(TDFILE) -gen-instr-selector -o $@ - clean:: $(VERB) rm -f *.inc diff --git a/lib/Target/SparcV8/Makefile b/lib/Target/SparcV8/Makefile index 78da738aa7b..2c9e3413bfe 100644 --- a/lib/Target/SparcV8/Makefile +++ b/lib/Target/SparcV8/Makefile @@ -16,7 +16,7 @@ TDFILE := $(SourceDir)/SparcV8.td # Make sure that tblgen is run, first thing. $(SourceDepend): SparcV8GenRegisterInfo.h.inc SparcV8GenRegisterNames.inc \ SparcV8GenRegisterInfo.inc SparcV8GenInstrNames.inc \ - SparcV8GenInstrInfo.inc SparcV8GenInstrSelector.inc + SparcV8GenInstrInfo.inc SparcV8GenRegisterNames.inc:: $(TDFILES) $(TBLGEN) @echo "Building SparcV8.td register names with tblgen" @@ -38,9 +38,5 @@ SparcV8GenInstrInfo.inc:: $(TDFILES) $(TBLGEN) @echo "Building SparcV8.td instruction information with tblgen" $(VERB) $(TBLGEN) -I $(BUILD_SRC_DIR) $(TDFILE) -gen-instr-desc -o $@ -SparcV8GenInstrSelector.inc:: $(TDFILES) $(TBLGEN) - @echo "Building SparcV8.td instruction selector with tblgen" - $(VERB) $(TBLGEN) -I $(BUILD_SRC_DIR) $(TDFILE) -gen-instr-selector -o $@ - clean:: $(VERB) rm -f *.inc