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ARM64: add regression test for r205519.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205520 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Tim Northover 2014-04-03 09:36:05 +00:00
parent 27d489f3b2
commit 107283d7cb
1 changed files with 29 additions and 0 deletions
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29
test/CodeGen/ARM64/regress-interphase-shift.ll Normal file
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; RUN: llc -march=arm64 -o - %s | FileCheck %s
; This is mostly a "don't assert" test. The type of the RHS of a shift depended
; on the phase of legalization, which led to the creation of an unexpected and
; unselectable "rotr" node: (i32 (rotr i32, i64)).
define void @foo(i64* nocapture %d) {
; CHECK-LABEL: foo:
; CHECK: rorv
%tmp = load i64* undef, align 8
%sub397 = sub i64 0, %tmp
%and398 = and i64 %sub397, 4294967295
%shr404 = lshr i64 %and398, 0
%or405 = or i64 0, %shr404
%xor406 = xor i64 %or405, 0
%xor417 = xor i64 0, %xor406
%xor428 = xor i64 0, %xor417
%sub430 = sub i64 %xor417, 0
%and431 = and i64 %sub430, 4294967295
%and432 = and i64 %xor428, 31
%sub433 = sub i64 32, %and432
%shl434 = shl i64 %and431, %sub433
%shr437 = lshr i64 %and431, %and432
%or438 = or i64 %shl434, %shr437
%xor439 = xor i64 %or438, %xor428
%sub441 = sub i64 %xor439, 0
store i64 %sub441, i64* %d, align 8
ret void
}