From 109a5626e76053ab7c24a434fdfaab1aecb53518 Mon Sep 17 00:00:00 2001 From: Evan Cheng Date: Fri, 17 Oct 2008 21:02:22 +0000 Subject: [PATCH] Add implicit defs of XMM8 to XMM15 on 32-bit call instructions. While this is not technically true, it tells tblgen that these instructions "clobber" the entire XMM register file. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57723 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/X86/X86InstrInfo.td | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/lib/Target/X86/X86InstrInfo.td b/lib/Target/X86/X86InstrInfo.td index f44b918438a..e23bc704b08 100644 --- a/lib/Target/X86/X86InstrInfo.td +++ b/lib/Target/X86/X86InstrInfo.td @@ -461,7 +461,8 @@ let isCall = 1 in // registers are added manually. let Defs = [EAX, ECX, EDX, FP0, FP1, FP2, FP3, FP4, FP5, FP6, ST0, MM0, MM1, MM2, MM3, MM4, MM5, MM6, MM7, - XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7, EFLAGS], + XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7, + XMM8, XMM9, XMM10, XMM11, XMM12, XMM13, XMM14, XMM15, EFLAGS], Uses = [ESP] in { def CALLpcrel32 : Ii32<0xE8, RawFrm, (outs), (ins i32imm:$dst,variable_ops), "call\t${dst:call}", []>;