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For pre-v6t2 targets, only select MOVi32imm if the immediate can be handled with movi + orr.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118945 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Evan Cheng
2010-11-12 23:46:13 +00:00
parent 8bfdd87714
commit 11c11f8ab0
3 changed files with 11 additions and 15 deletions
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17
lib/Target/ARM/ARMInstrInfo.td
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@@ -359,12 +359,17 @@ def so_imm : Operand<i32>, PatLeaf<(imm), [{ return Pred_so_imm(N); }]> {
// Break so_imm's up into two pieces. This handles immediates with up to 16 // Break so_imm's up into two pieces. This handles immediates with up to 16
// bits set in them. This uses so_imm2part to match and so_imm2part_[12] to // bits set in them. This uses so_imm2part to match and so_imm2part_[12] to
// get the first/second pieces. // get the first/second pieces.
def so_imm2part : Operand<i32>, def so_imm2part : PatLeaf<(imm), [{
PatLeaf<(imm), [{
return ARM_AM::isSOImmTwoPartVal((unsigned)N->getZExtValue()); return ARM_AM::isSOImmTwoPartVal((unsigned)N->getZExtValue());
}]> { }]>;
let PrintMethod = "printSOImm2PartOperand";
} /// arm_i32imm - True for +V6T2, or true only if so_imm2part is true.
///
def arm_i32imm : PatLeaf<(imm), [{
if (Subtarget->hasV6T2Ops())
return true;
return ARM_AM::isSOImmTwoPartVal((unsigned)N->getZExtValue());
}]>;
def so_imm2part_1 : SDNodeXForm<imm, [{ def so_imm2part_1 : SDNodeXForm<imm, [{
unsigned V = ARM_AM::getSOImmTwoPartFirst((unsigned)N->getZExtValue()); unsigned V = ARM_AM::getSOImmTwoPartFirst((unsigned)N->getZExtValue());
@@ -3223,7 +3228,7 @@ def : ARMPat<(add GPR:$LHS, so_neg_imm2part:$RHS),
// FIXME: Remove this when we can do generalized remat. // FIXME: Remove this when we can do generalized remat.
let isReMaterializable = 1 in let isReMaterializable = 1 in
def MOVi32imm : PseudoInst<(outs GPR:$dst), (ins i32imm:$src), IIC_iMOVix2, "", def MOVi32imm : PseudoInst<(outs GPR:$dst), (ins i32imm:$src), IIC_iMOVix2, "",
[(set GPR:$dst, (i32 imm:$src))]>, [(set GPR:$dst, (arm_i32imm:$src))]>,
Requires<[IsARM]>; Requires<[IsARM]>;
// ConstantPool, GlobalAddress, and JumpTable // ConstantPool, GlobalAddress, and JumpTable

8
lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp
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@@ -160,14 +160,6 @@ void ARMInstPrinter::printSOImmOperand(const MCInst *MI, unsigned OpNum,
printSOImm(O, MO.getImm(), CommentStream, &MAI); printSOImm(O, MO.getImm(), CommentStream, &MAI);
} }
/// printSOImm2PartOperand - SOImm is broken into two pieces using a 'mov'
/// followed by an 'orr' to materialize.
void ARMInstPrinter::printSOImm2PartOperand(const MCInst *MI, unsigned OpNum,
raw_ostream &O) {
// FIXME: REMOVE this method.
abort();
}
// so_reg is a 4-operand unit corresponding to register forms of the A5.1 // so_reg is a 4-operand unit corresponding to register forms of the A5.1
// "Addressing Mode 1 - Data-processing operands" forms. This includes: // "Addressing Mode 1 - Data-processing operands" forms. This includes:
// REG 0 0 - e.g. R5 // REG 0 0 - e.g. R5

1
lib/Target/ARM/InstPrinter/ARMInstPrinter.h
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@@ -36,7 +36,6 @@ public:
void printOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O); void printOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O);
void printSOImmOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O); void printSOImmOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O);
void printSOImm2PartOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O);
void printSORegOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O); void printSORegOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O);
void printAddrMode2Operand(const MCInst *MI, unsigned OpNum, raw_ostream &O); void printAddrMode2Operand(const MCInst *MI, unsigned OpNum, raw_ostream &O);