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Thumb instructions CBZ and CBNZ are Thumb2, not THumb1.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137956 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jim Grosbach 2011-08-18 17:51:36 +00:00
parent 7cf6d7a083
commit 11cca7a2ea
2 changed files with 28 additions and 25 deletions
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25
lib/Target/ARM/ARMInstrThumb.td
View File

@ -490,31 +490,6 @@ let isBranch = 1, isTerminator = 1 in
let Inst{7-0} = target;
}
// Compare and branch on zero / non-zero
let isBranch = 1, isTerminator = 1 in {
def tCBZ : T1I<(outs), (ins tGPR:$Rn, t_cbtarget:$target), IIC_Br,
"cbz\t$Rn, $target", []>,
T1Misc<{0,0,?,1,?,?,?}> {
// A8.6.27
bits<6> target;
bits<3> Rn;
let Inst{9} = target{5};
let Inst{7-3} = target{4-0};
let Inst{2-0} = Rn;
}
def tCBNZ : T1I<(outs), (ins tGPR:$Rn, t_cbtarget:$target), IIC_Br,
"cbnz\t$Rn, $target", []>,
T1Misc<{1,0,?,1,?,?,?}> {
// A8.6.27
bits<6> target;
bits<3> Rn;
let Inst{9} = target{5};
let Inst{7-3} = target{4-0};
let Inst{2-0} = Rn;
}
}
// Tail calls
let isCall = 1, isTerminator = 1, isReturn = 1, isBarrier = 1 in {
// Darwin versions.

28
lib/Target/ARM/ARMInstrThumb2.td
View File

@ -3052,6 +3052,34 @@ def t2BXJ : T2I<(outs), (ins rGPR:$func), NoItinerary, "bxj", "\t$func",
let Inst{19-16} = func;
}
// Compare and branch on zero / non-zero
let isBranch = 1, isTerminator = 1 in {
def tCBZ : T1I<(outs), (ins tGPR:$Rn, t_cbtarget:$target), IIC_Br,
"cbz\t$Rn, $target", []>,
T1Misc<{0,0,?,1,?,?,?}>,
Requires<[IsThumb2]> {
// A8.6.27
bits<6> target;
bits<3> Rn;
let Inst{9} = target{5};
let Inst{7-3} = target{4-0};
let Inst{2-0} = Rn;
}
def tCBNZ : T1I<(outs), (ins tGPR:$Rn, t_cbtarget:$target), IIC_Br,
"cbnz\t$Rn, $target", []>,
T1Misc<{1,0,?,1,?,?,?}>,
Requires<[IsThumb2]> {
// A8.6.27
bits<6> target;
bits<3> Rn;
let Inst{9} = target{5};
let Inst{7-3} = target{4-0};
let Inst{2-0} = Rn;
}
}
// Change Processor State is a system instruction -- for disassembly and
// parsing only.
// FIXME: Since the asm parser has currently no clean way to handle optional