6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2024-08-24 09:29:42 +00:00
Code Issues Projects Releases Wiki Activity

Merge pmovzx test case into existing file.

Browse Source 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131539 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Stuart Hastings 2011-05-18 17:02:04 +00:00
parent d116611e0a
commit 11d26f109d
2 changed files with 19 additions and 15 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

15
test/CodeGen/X86/2011-05-17-pmovzxwd.ll
View File

@ -1,15 +0,0 @@
; RUN: opt -instcombine -S < %s | FileCheck %s
; <rdar://problem/6945110>
define <4 x i32> @kernel3_vertical(<4 x i16> * %src, <8 x i16> * %foo) nounwind {
entry:
%tmp = load <4 x i16>* %src
%tmp1 = load <8 x i16>* %foo
; CHECK: shufflevector
%tmp2 = shufflevector <4 x i16> %tmp, <4 x i16> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef>
; CHECK-NOT: shufflevector
%tmp3 = shufflevector <8 x i16> %tmp1, <8 x i16> %tmp2, <8 x i32> <i32 8, i32 9, i32 10, i32 11, i32 4, i32 5, i32 6, i32 7>
%0 = call <4 x i32> @llvm.x86.sse41.pmovzxwd(<8 x i16> %tmp3)
ret <4 x i32> %0
}
declare <4 x i32> @llvm.x86.sse41.pmovzxwd(<8 x i16>) nounwind readnone

19
test/CodeGen/X86/vec_shuffle-36.ll
View File

@ -1,4 +1,5 @@
; RUN: llc < %s -march=x86-64 -mattr=sse41 | FileCheck %s
; RUN: opt -std-compile-opts < %s | llc -march=x86-64 -mattr=sse41 | FileCheck --check-prefix=CHECK_OPT_LLC %s
define <8 x i16> @shuf6(<8 x i16> %T0, <8 x i16> %T1) nounwind readnone {
; CHECK: pshufb
@ -14,3 +15,21 @@ define <8 x i16> @shuf7(<8 x i16> %t0) {
%tmp10 = shufflevector <8 x i16> %t0, <8 x i16> undef, <8 x i32> < i32 undef, i32 2, i32 2, i32 2, i32 2, i32 2, i32 undef, i32 undef >
ret <8 x i16> %tmp10
}
; <rdar://problem/6945110>
define <4 x i32> @kernel3_vertical(<4 x i16> * %src, <8 x i16> * %foo) nounwind {
entry:
; CHECK_OPT_LLC: call{{.*nothing}}
call void @nothing()
%tmp = load <4 x i16>* %src
%tmp1 = load <8 x i16>* %foo
; pmovzxwd ignores the upper 64-bits of its input; everything between the call and pmovzxwd should be removed.
%tmp2 = shufflevector <4 x i16> %tmp, <4 x i16> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef>
%tmp3 = shufflevector <8 x i16> %tmp1, <8 x i16> %tmp2, <8 x i32> <i32 8, i32 9, i32 10, i32 11, i32 4, i32 5, i32 6, i32 7>
; CHECK_OPT_LLC-NEXT: pmovzxwd
%0 = call <4 x i32> @llvm.x86.sse41.pmovzxwd(<8 x i16> %tmp3)
ret <4 x i32> %0
}
declare void @nothing() nounwind
declare <4 x i32> @llvm.x86.sse41.pmovzxwd(<8 x i16>) nounwind readnone