mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2025-01-02 22:32:38 +00:00
Allow some automatic tailcall optimization without changing ABI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94611 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
parent
1613f40bab
commit
11e679324b
@ -5122,9 +5122,7 @@ void SelectionDAGBuilder::visitCall(CallInst &I) {
|
|||||||
|
|
||||||
// Check if we can potentially perform a tail call. More detailed checking is
|
// Check if we can potentially perform a tail call. More detailed checking is
|
||||||
// be done within LowerCallTo, after more information about the call is known.
|
// be done within LowerCallTo, after more information about the call is known.
|
||||||
bool isTailCall = PerformTailCallOpt && I.isTailCall();
|
LowerCallTo(&I, Callee, I.isTailCall());
|
||||||
|
|
||||||
LowerCallTo(&I, Callee, isTailCall);
|
|
||||||
}
|
}
|
||||||
|
|
||||||
/// getCopyFromRegs - Emit a series of CopyFromReg nodes that copies from
|
/// getCopyFromRegs - Emit a series of CopyFromReg nodes that copies from
|
||||||
@ -6118,9 +6116,6 @@ TargetLowering::LowerCallTo(SDValue Chain, const Type *RetTy,
|
|||||||
SDValue Callee,
|
SDValue Callee,
|
||||||
ArgListTy &Args, SelectionDAG &DAG, DebugLoc dl,
|
ArgListTy &Args, SelectionDAG &DAG, DebugLoc dl,
|
||||||
unsigned Order) {
|
unsigned Order) {
|
||||||
assert((!isTailCall || PerformTailCallOpt) &&
|
|
||||||
"isTailCall set when tail-call optimizations are disabled!");
|
|
||||||
|
|
||||||
// Handle all of the outgoing arguments.
|
// Handle all of the outgoing arguments.
|
||||||
SmallVector<ISD::OutputArg, 32> Outs;
|
SmallVector<ISD::OutputArg, 32> Outs;
|
||||||
for (unsigned i = 0, e = Args.size(); i != e; ++i) {
|
for (unsigned i = 0, e = Args.size(); i != e; ++i) {
|
||||||
|
Loading…
Reference in New Issue
Block a user