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Make check in CheckTailCallReturnConstraints for ignorable instructions between
a CALL and a RET node more generic. Add a test for tail calls with a void return. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67943 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -2572,26 +2572,40 @@ SDValue TargetLowering::BuildUDIV(SDNode *N, SelectionDAG &DAG,
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}
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}
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bool TargetLowering::CheckTailCallReturnConstraints(CallSDNode *TheCall, SDValue Ret) {
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/// IgnoreHarmlessInstructions - Ignore instructions between a CALL and RET
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/// node that don't prevent tail call optimization.
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static SDValue IgnoreHarmlessInstructions(SDValue node) {
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// Found call return.
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if (node.getOpcode() == ISD::CALL) return node;
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// Ignore MERGE_VALUES. Will have at least one operand.
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if (node.getOpcode() == ISD::MERGE_VALUES)
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return IgnoreHarmlessInstructions(node.getOperand(0));
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// Ignore ANY_EXTEND node.
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if (node.getOpcode() == ISD::ANY_EXTEND)
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return IgnoreHarmlessInstructions(node.getOperand(0));
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if (node.getOpcode() == ISD::TRUNCATE)
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return IgnoreHarmlessInstructions(node.getOperand(0));
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// Any other node type.
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return node;
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}
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bool TargetLowering::CheckTailCallReturnConstraints(CallSDNode *TheCall,
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SDValue Ret) {
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unsigned NumOps = Ret.getNumOperands();
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// Struct return.
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if(NumOps >= 5&&
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Ret.getOperand(1).getOpcode()==ISD::MERGE_VALUES &&
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Ret.getOperand(1).getOperand(0) == SDValue(TheCall, 0))
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// ISD::CALL results:(value0, ..., valuen, chain)
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// ISD::RET operands:(chain, value0, flag0, ..., valuen, flagn)
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// Value return:
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// Check that operand of the RET node sources from the CALL node. The RET node
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// has at least two operands. Operand 0 holds the chain. Operand 1 holds the
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// value.
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if (NumOps > 1 &&
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IgnoreHarmlessInstructions(Ret.getOperand(1)) == SDValue(TheCall,0))
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return true;
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if ((NumOps == 1 &&
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(Ret.getOperand(0) == SDValue(TheCall,1) ||
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Ret.getOperand(0) == SDValue(TheCall,0))) ||
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(NumOps == 3 &&
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Ret.getOperand(1).getOpcode() == ISD::ANY_EXTEND &&
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Ret.getOperand(1).getNumOperands()>0 &&
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Ret.getOperand(1).getOperand(0).getOpcode() == ISD::TRUNCATE &&
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Ret.getOperand(1).getOperand(0).getNumOperands()>0 &&
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Ret.getOperand(1).getOperand(0).getOperand(0) == SDValue(TheCall, 0)) ||
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(NumOps > 1 &&
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Ret.getOperand(0) == SDValue(TheCall,
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TheCall->getNumValues()-1) &&
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Ret.getOperand(1) == SDValue(TheCall,0)))
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// void return: The RET node has the chain result value of the CALL node as
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// input.
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if (NumOps == 1 &&
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Ret.getOperand(0) == SDValue(TheCall, TheCall->getNumValues()-1))
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return true;
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return false;
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}
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6
test/CodeGen/X86/tailcall-void.ll
Normal file
6
test/CodeGen/X86/tailcall-void.ll
Normal file
@ -0,0 +1,6 @@
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; RUN: llvm-as < %s | llc -march=x86 -tailcallopt | grep TAILCALL
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define fastcc void @i1test(i32, i32, i32, i32) {
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entry:
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tail call fastcc void @i1test( i32 %0, i32 %1, i32 %2, i32 %3)
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ret void
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}
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