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Tidy up ScheduleNodeBottomUp methods, and make them more

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consistent with ScheduleNodeTopDown methods.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59550 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Dan Gohman
2008-11-18 21:22:20 +00:00
parent 0454e8685f
commit 1256f5fe76
2 changed files with 8 additions and 10 deletions
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6
lib/CodeGen/SelectionDAG/ScheduleDAGFast.cpp
View File

@@ -161,7 +161,9 @@ void ScheduleDAGFast::ReleasePred(SUnit *SU, SUnit *PredSU, bool isChain) {
void ScheduleDAGFast::ScheduleNodeBottomUp(SUnit *SU, unsigned CurCycle) { void ScheduleDAGFast::ScheduleNodeBottomUp(SUnit *SU, unsigned CurCycle) {
DOUT << "*** Scheduling [" << CurCycle << "]: "; DOUT << "*** Scheduling [" << CurCycle << "]: ";
DEBUG(SU->dump(this)); DEBUG(SU->dump(this));
SU->Cycle = CurCycle; SU->Cycle = CurCycle;
Sequence.push_back(SU);
// Bottom up: release predecessors // Bottom up: release predecessors
for (SUnit::pred_iterator I = SU->Preds.begin(), E = SU->Preds.end(); for (SUnit::pred_iterator I = SU->Preds.begin(), E = SU->Preds.end();
@@ -589,10 +591,8 @@ void ScheduleDAGFast::ListScheduleBottomUp() {
if (!CurSU) if (!CurSU)
Sequence.push_back(0); Sequence.push_back(0);
else { else
ScheduleNodeBottomUp(CurSU, CurCycle); ScheduleNodeBottomUp(CurSU, CurCycle);
Sequence.push_back(CurSU);
}
++CurCycle; ++CurCycle;
} }

12
lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
View File

@@ -302,9 +302,9 @@ void ScheduleDAGRRList::ReleasePred(SUnit *SU, SUnit *PredSU, bool isChain) {
void ScheduleDAGRRList::ScheduleNodeBottomUp(SUnit *SU, unsigned CurCycle) { void ScheduleDAGRRList::ScheduleNodeBottomUp(SUnit *SU, unsigned CurCycle) {
DOUT << "*** Scheduling [" << CurCycle << "]: "; DOUT << "*** Scheduling [" << CurCycle << "]: ";
DEBUG(SU->dump(this)); DEBUG(SU->dump(this));
SU->Cycle = CurCycle;
AvailableQueue->ScheduledNode(SU); SU->Cycle = CurCycle;
Sequence.push_back(SU);
// Bottom up: release predecessors // Bottom up: release predecessors
for (SUnit::pred_iterator I = SU->Preds.begin(), E = SU->Preds.end(); for (SUnit::pred_iterator I = SU->Preds.begin(), E = SU->Preds.end();
@@ -339,6 +339,7 @@ void ScheduleDAGRRList::ScheduleNodeBottomUp(SUnit *SU, unsigned CurCycle) {
} }
SU->isScheduled = true; SU->isScheduled = true;
AvailableQueue->ScheduledNode(SU);
} }
/// CapturePred - This does the opposite of ReleasePred. Since SU is being /// CapturePred - This does the opposite of ReleasePred. Since SU is being
@@ -1060,10 +1061,8 @@ void ScheduleDAGRRList::ListScheduleBottomUp() {
if (!CurSU) if (!CurSU)
Sequence.push_back(0); Sequence.push_back(0);
else { else
ScheduleNodeBottomUp(CurSU, CurCycle); ScheduleNodeBottomUp(CurSU, CurCycle);
Sequence.push_back(CurSU);
}
++CurCycle; ++CurCycle;
} }
@@ -1193,9 +1192,8 @@ void ScheduleDAGRRList::ListScheduleTopDown() {
if (!CurSU) if (!CurSU)
Sequence.push_back(0); Sequence.push_back(0);
else { else
ScheduleNodeTopDown(CurSU, CurCycle); ScheduleNodeTopDown(CurSU, CurCycle);
}
++CurCycle; ++CurCycle;
} }