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AArch64: Add test for returning [2 x i64] in registers. NFC.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235228 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Pete Cooper 2015-04-17 21:31:25 +00:00
parent fb118bd226
commit 12a57fe1d3
1 changed files with 11 additions and 0 deletions
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11
test/CodeGen/AArch64/arm64-aapcs.ll
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@ -2,6 +2,7 @@
@var = global i32 0, align 4
; CHECK-LABEL: @test_i128_align
define i128 @test_i128_align(i32, i128 %arg, i32 %after) {
store i32 %after, i32* @var, align 4
; CHECK: str w4, [{{x[0-9]+}}, :lo12:var]
@ -11,6 +12,16 @@ define i128 @test_i128_align(i32, i128 %arg, i32 %after) {
; CHECK: mov x1, x3
}
; CHECK-LABEL: @test_i64x2_align
define [2 x i64] @test_i64x2_align(i32, [2 x i64] %arg, i32 %after) {
store i32 %after, i32* @var, align 4
; CHECK: str w3, [{{x[0-9]+}}, :lo12:var]
ret [2 x i64] %arg
; CHECK: mov x0, x1
; CHECK: mov x1, x2
}
@var64 = global i64 0, align 8
; Check stack slots are 64-bit at all times.