[PowerPC] Fix PR16556 (handle undef ppcf128 in LowerFP_TO_INT).

PPCTargetLowering::LowerFP_TO_INT() expects its source operand to be
either an f32 or f64, but this is not checked.  A long double
(ppcf128) operand will normally be custom-lowered to a conversion to
f64 in this context.  However, this isn't the case for an UNDEF node.

This patch recognizes a ppcf128 as a legal source operand for
FP_TO_INT only if it's an undef, in which case it creates an undef of
the target type.

At some point we might want to do a wholesale custom lowering of
ISD::UNDEF when the type is ppcf128, but it's not really clear that's
a great idea, and probably more work than it's worth for a situation
that only arises in the case of a programming error.  At this point I
think simple is best.

The test case comes from PR16556, and is a crash-test only.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185821 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Bill Schmidt 2013-07-08 14:22:45 +00:00
parent 9f23fe0ea5
commit 12ae7fd2da
2 changed files with 29 additions and 0 deletions

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@ -4685,6 +4685,15 @@ SDValue PPCTargetLowering::LowerFP_TO_INT(SDValue Op, SelectionDAG &DAG,
SDLoc dl) const { SDLoc dl) const {
assert(Op.getOperand(0).getValueType().isFloatingPoint()); assert(Op.getOperand(0).getValueType().isFloatingPoint());
SDValue Src = Op.getOperand(0); SDValue Src = Op.getOperand(0);
// If we have a long double here, it must be that we have an undef of
// that type. In this case return an undef of the target type.
if (Src.getValueType() == MVT::ppcf128) {
assert(Src.getOpcode() == ISD::UNDEF && "Unhandled ppcf128!");
return DAG.getNode(ISD::UNDEF, dl,
Op.getValueType().getSimpleVT().SimpleTy);
}
if (Src.getValueType() == MVT::f32) if (Src.getValueType() == MVT::f32)
Src = DAG.getNode(ISD::FP_EXTEND, dl, MVT::f64, Src); Src = DAG.getNode(ISD::FP_EXTEND, dl, MVT::f64, Src);

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@ -0,0 +1,20 @@
; RUN: llc < %s
; This test formerly failed due to no handling for a ppc_fp128 undef.
target datalayout = "E-p:32:32:32-S0-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f16:16:16-f32:32:32-f64:64:64-f128:64:128-v64:64:64-v128:128:128-a0:0:64-n32"
target triple = "powerpc-unknown-linux-gnu"
%core.time.TickDuration.37.125 = type { i64 }
define weak_odr fastcc i64 @_D4core4time12TickDuration30__T2toVAyaa7_7365636f6e6473TlZ2toMxFNaNbNfZl(%core.time.TickDuration.37.125* %.this_arg) {
entry:
br i1 undef, label %noassert, label %assert
assert: ; preds = %entry
unreachable
noassert: ; preds = %entry
%tmp9 = fptosi ppc_fp128 undef to i64
ret i64 %tmp9
}