mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-12-14 11:32:34 +00:00
Removed class RegStackOffsets and used class MachineCodeForMethod
directly to manage stack frame. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@1186 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Vikram S. Adve
parent
be49526193
commit
12af164c87
@ -1,7 +1,23 @@
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#include "llvm/CodeGen/PhyRegAlloc.h"
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// $Id$
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//***************************************************************************
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// File:
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// PhyRegAlloc.cpp
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//
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// Purpose:
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// Register allocation for LLVM.
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//
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// History:
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// 9/10/01 - Ruchira Sasanka - created.
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//**************************************************************************/
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//***TODO: There are several places we add instructions. Validate the order
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// of adding these instructions.
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#include "llvm/CodeGen/PhyRegAlloc.h"
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#include "llvm/CodeGen/MachineInstr.h"
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#include "llvm/Target/TargetMachine.h"
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#include "llvm/Target/MachineFrameInfo.h"
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// ***TODO: There are several places we add instructions. Validate the order
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// of adding these instructions.
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@ -15,15 +31,18 @@ cl::Enum<RegAllocDebugLevel_t> DEBUG_RA("dregalloc", cl::NoFlags,
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//----------------------------------------------------------------------------
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// Constructor: Init local composite objects and create register classes.
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//----------------------------------------------------------------------------
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PhyRegAlloc::PhyRegAlloc(const Method *const M,
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PhyRegAlloc::PhyRegAlloc(Method *M,
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const TargetMachine& tm,
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MethodLiveVarInfo *const Lvi)
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: RegClassList(),
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Meth(M), TM(tm), LVI(Lvi), LRI(M, tm, RegClassList),
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TM(tm),
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Meth(M),
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mcInfo(MachineCodeForMethod::get(M)),
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LVI(Lvi), LRI(M, tm, RegClassList),
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MRI( tm.getRegInfo() ),
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NumOfRegClasses(MRI.getNumOfRegClasses()),
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AddedInstrMap(), StackOffsets() /*, PhiInstList()*/
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AddedInstrMap()
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/*, PhiInstList()*/
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{
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// **TODO: use an actual reserved color list
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ReservedColorListType *RCL = new ReservedColorListType();
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@ -31,10 +50,6 @@ PhyRegAlloc::PhyRegAlloc(const Method *const M,
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// create each RegisterClass and put in RegClassList
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for( unsigned int rc=0; rc < NumOfRegClasses; rc++)
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RegClassList.push_back( new RegClass(M, MRI.getMachineRegClass(rc), RCL) );
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// **TODO: Init to the correct value. Also reset this to the correct
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// value at the start of each instruction. Need a way to track max used
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int curOffset4TmpSpills =0 ;
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}
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//----------------------------------------------------------------------------
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@ -318,125 +333,6 @@ void PhyRegAlloc::addInterferencesForArgs()
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}
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#if 0
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//----------------------------------------------------------------------------
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// This method inserts caller saving/restoring instructons before/after
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// a call machine instruction.
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//----------------------------------------------------------------------------
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void PhyRegAlloc::insertCallerSavingCode(const MachineInstr *MInst,
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const BasicBlock *BB )
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{
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// assert( (TM.getInstrInfo()).isCall( MInst->getOpCode() ) );
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StackOffsets.resetTmpPos();
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hash_set<unsigned> PushedRegSet;
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// Now find the LR of the return value of the call
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// The last *implicit operand* is the return value of a call
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// Insert it to to he PushedRegSet since we must not save that register
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// and restore it after the call.
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// We do this because, we look at the LV set *after* the instruction
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// to determine, which LRs must be saved across calls. The return value
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// of the call is live in this set - but we must not save/restore it.
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const Value *RetVal = MRI.getCallInstRetVal( MInst );
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if( RetVal ) {
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LiveRange *RetValLR = LRI.getLiveRangeForValue( RetVal );
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assert( RetValLR && "No LR for RetValue of call");
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PushedRegSet.insert(
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MRI.getUnifiedRegNum((RetValLR->getRegClass())->getID(),
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RetValLR->getColor() ) );
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}
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const LiveVarSet *LVSetAft = LVI->getLiveVarSetAfterMInst(MInst, BB);
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LiveVarSet::const_iterator LIt = LVSetAft->begin();
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// for each live var in live variable set after machine inst
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for( ; LIt != LVSetAft->end(); ++LIt) {
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// get the live range corresponding to live var
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LiveRange *const LR = LRI.getLiveRangeForValue(*LIt );
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// LR can be null if it is a const since a const
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// doesn't have a dominating def - see Assumptions above
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if( LR ) {
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if( LR->hasColor() ) {
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unsigned RCID = (LR->getRegClass())->getID();
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unsigned Color = LR->getColor();
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if ( MRI.isRegVolatile(RCID, Color) ) {
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// if the value is in both LV sets (i.e., live before and after
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// the call machine instruction)
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unsigned Reg = MRI.getUnifiedRegNum(RCID, Color);
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if( PushedRegSet.find(Reg) == PushedRegSet.end() ) {
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// if we haven't already pushed that register
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unsigned RegType = MRI.getRegType( LR );
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// Now get two instructions - to push on stack and pop from stack
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// and add them to InstrnsBefore and InstrnsAfter of the
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// call instruction
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int StackOff = StackOffsets.getNewTmpPosOffFromSP();
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/**** TODO
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if( RegType == SaveViaIntReg) {
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int FreeIntReg = getFreedIntReg(......)
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}
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*/
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MachineInstr *AdIBef =
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MRI.cpReg2MemMI(Reg, MRI.getStackPointer(), StackOff, RegType );
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MachineInstr *AdIAft =
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MRI.cpMem2RegMI(MRI.getStackPointer(), StackOff, Reg, RegType );
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((AddedInstrMap[MInst])->InstrnsBefore).push_front(AdIBef);
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((AddedInstrMap[MInst])->InstrnsAfter).push_back(AdIAft);
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PushedRegSet.insert( Reg );
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if(DEBUG_RA) {
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cerr << "\nFor callee save call inst:" << *MInst;
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cerr << "\n -inserted caller saving instrs:\n\t ";
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cerr << *AdIBef << "\n\t" << *AdIAft ;
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}
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} // if not already pushed
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} // if LR has a volatile color
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} // if LR has color
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} // if there is a LR for Var
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} // for each value in the LV set after instruction
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}
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#endif
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//----------------------------------------------------------------------------
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// This method is called after register allocation is complete to set the
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// allocated reisters in the machine code. This code will add register numbers
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@ -490,8 +386,8 @@ void PhyRegAlloc::updateMachineCode()
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// reset the stack offset for temporary variables since we may
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// need that to spill
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StackOffsets.resetTmpPos();
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mcInfo.popAllTempValues(TM);
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//for(MachineInstr::val_op_const_iterator OpI(MInst);!OpI.done();++OpI) {
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for(unsigned OpNum=0; OpNum < MInst->getNumOperands(); ++OpNum) {
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@ -607,82 +503,6 @@ void PhyRegAlloc::updateMachineCode()
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}
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#if 0
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//----------------------------------------------------------------------------
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// This method inserts spill code for AN operand whose LR was spilled.
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// This method may be called several times for a single machine instruction
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// if it contains many spilled operands. Each time it is called, it finds
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// a register which is not live at that instruction and also which is not
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// used by other spilled operands of the same instruction. Then it uses
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// this register temporarily to accomodate the spilled value.
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//----------------------------------------------------------------------------
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void PhyRegAlloc::insertCode4SpilledLR(const LiveRange *LR,
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const MachineInstr *MInst,
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const BasisBlock *BB,
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const unsigned OpNum) {
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MachineOperand& Op = MInst->getOperand(OpNum);
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bool isDef = MInst->operandIsDefined(OpNum);
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unsigned RegType = MRI.getRegType( LR );
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int SpillOff = LR->getSpillOffFromFP();
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RegClass *RC = LR->getRegClass();
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const LiveVarSet *LVSetBef = LVI->getLiveVarSetBeforeMInst(MInst, BB);
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int TmpOff = StackOffsets.getNewTmpPosOffFromSP();
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MachineInstr *MIBef, *AdIMid, *MIAft;
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int TmpReg;
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TmpReg = getUsableRegAtMI(RC, RegType, MInst,LVSetBef, MIBef, MIAft);
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TmpReg = getUnifiedRegNum( RC->getID(), TmpReg );
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if( !isDef ) {
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// for a USE, we have to load the value of LR from stack to a TmpReg
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// and use the TmpReg as one operand of instruction
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// actual loading instruction
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AdIMid = MRI.cpMem2RegMI(MRI.getFramePointer(), SpillOff, TmpReg, RegType);
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if( MIBef )
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((AddedInstrMap[MInst])->InstrnsBefore).push_back(MIBef);
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((AddedInstrMap[MInst])->InstrnsBefore).push_back(AdiMid);
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if( MIAft)
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((AddedInstrMap[MInst])->InstrnsAfter).push_front(MIAft);
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}
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else { // if this is a Def
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// for a DEF, we have to store the value produced by this instruction
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// on the stack position allocated for this LR
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// actual storing instruction
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AdIMid = MRI.cpReg2MemMI(TmpReg, MRI.getFramePointer(), SpillOff, RegType);
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if( MIBef )
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((AddedInstrMap[MInst])->InstrnsBefore).push_back(MIBef);
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((AddedInstrMap[MInst])->InstrnsBefore).push_back(AdiMid);
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if( MIAft)
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((AddedInstrMap[MInst])->InstrnsAfter).push_front(MIAft);
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} // if !DEF
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Op.setRegForValue( TmpReg ); // set the opearnd
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}
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#endif
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//----------------------------------------------------------------------------
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// We can use the following method to get a temporary register to be used
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// BEFORE any given machine instruction. If there is a register available,
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@ -710,8 +530,9 @@ int PhyRegAlloc::getUsableRegAtMI(RegClass *RC,
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// we couldn't find an unused register. Generate code to free up a reg by
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// saving it on stack and restoring after the instruction
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int TmpOff = StackOffsets.getNewTmpPosOffFromFP();
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/**** NOTE: THIS SHOULD USE THE RIGHT SIZE FOR THE REG BEING PUSHED ****/
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int TmpOff = mcInfo.pushTempValue(TM, /*size*/ 8);
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Reg = getRegNotUsedByThisInst(RC, MInst);
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MIBef = MRI.cpReg2MemMI(Reg, MRI.getFramePointer(), TmpOff, RegType );
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MIAft = MRI.cpMem2RegMI(MRI.getFramePointer(), TmpOff, Reg, RegType );
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@ -1011,8 +832,8 @@ void PhyRegAlloc::colorCallRetArgs()
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// Tmp stack poistions are needed by some calls that have spilled args
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// So reset it before we call each such method
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StackOffsets.resetTmpPos();
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mcInfo.popAllTempValues(TM);
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if( (TM.getInstrInfo()).isCall( OpCode ) )
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MRI.colorCallArgs( CRMI, LRI, AI, *this );
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@ -1112,17 +933,13 @@ void PhyRegAlloc::allocateStackSpace4SpilledLRs()
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LiveRangeMapType::const_iterator HMIEnd = (LRI.getLiveRangeMap())->end();
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for( ; HMI != HMIEnd ; ++HMI ) {
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if( (*HMI).first ) {
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LiveRange *L = (*HMI).second; // get the LiveRange
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if(L)
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if( ! L->hasColor() )
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L->setSpillOffFromFP( StackOffsets.getNewSpillOffFromFP() );
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L->setSpillOffFromFP(mcInfo.allocateSpilledValue(TM,L->getType()));
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}
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} // for all LR's in hash map
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StackOffsets.setEndOfSpillRegion();
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}
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@ -1195,7 +1012,7 @@ void PhyRegAlloc::allocateRegisters()
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updateMachineCode();
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if (DEBUG_RA) {
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Meth->getMachineCode().dump();
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MachineCodeForMethod::get(Meth).dump();
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printMachineCode(); // only for DEBUGGING
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}
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}
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@ -62,73 +62,6 @@ typedef hash_map<const MachineInstr *, AddedInstrns *> AddedInstrMapType;
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//----------------------------------------------------------------------------
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// Class RegStackOffsets:
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// This class is responsible for managing stack frame of the method for
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// register allocation.
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//
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//----------------------------------------------------------------------------
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class RegStackOffsets {
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private:
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int curSpilledVarOff; // cur pos of spilled LRs
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int curNewTmpPosOffset; // cur pos of tmp values on stack
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bool isTmpRegionUsable; // can we call getNewTmpPosOffFromFP
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const int SizeOfStackItem; // size of an item on stack
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const int StackSpillStartFromFP; // start position of spill region
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int StartOfTmpRegion; // start of the tmp var region
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public:
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// constructor
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RegStackOffsets(int SEnSize=8, int StartSpill=176 ) :
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SizeOfStackItem(SEnSize), StackSpillStartFromFP(StartSpill) {
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curSpilledVarOff = StartSpill;
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isTmpRegionUsable = false;
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};
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int getNewSpillOffFromFP() {
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int tmp = curSpilledVarOff;
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curSpilledVarOff += SizeOfStackItem;
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return tmp; // **TODO: Is sending un-incremented value correct?
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};
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// The following method must be called only after allocating space
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// for spilled LRs and calling setEndOfSpillRegion()
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int getNewTmpPosOffFromFP() {
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assert( isTmpRegionUsable && "Spill region still open");
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int tmp = curNewTmpPosOffset;
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curNewTmpPosOffset += SizeOfStackItem;
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return tmp; //**TODO: Is sending un-incremented val correct?
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};
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// This method is called when we have allocated space for all spilled
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// LRs. The tmp region can be used only after a call to this method.
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void setEndOfSpillRegion() {
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assert(( ! isTmpRegionUsable) && "setEndOfSpillRegion called again");
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isTmpRegionUsable = true;
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StartOfTmpRegion = curSpilledVarOff;
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}
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// called when temporary values allocated on stack are no longer needed
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void resetTmpPos() {
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curNewTmpPosOffset = StartOfTmpRegion;
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}
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};
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//----------------------------------------------------------------------------
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// class PhyRegAlloc:
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// Main class the register allocator. Call allocateRegisters() to allocate
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@ -136,12 +69,13 @@ class RegStackOffsets {
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//----------------------------------------------------------------------------
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class PhyRegAlloc
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class PhyRegAlloc: public NonCopyable
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{
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vector<RegClass *> RegClassList ; // vector of register classes
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const Method *const Meth; // name of the method we work on
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const TargetMachine &TM; // target machine
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const Method* Meth; // name of the method we work on
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MachineCodeForMethod& mcInfo; // descriptor for method's native code
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MethodLiveVarInfo *const LVI; // LV information for this method
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// (already computed for BBs)
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LiveRangeInfo LRI; // LR info (will be computed)
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@ -154,8 +88,6 @@ class PhyRegAlloc
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AddedInstrMapType AddedInstrMap; // to store instrns added in this phase
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RegStackOffsets StackOffsets;
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//vector<const MachineInstr *> PhiInstList; // a list of all phi instrs
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//------- private methods ---------------------------------------------------
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@ -178,10 +110,6 @@ class PhyRegAlloc
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void markUnusableSugColors();
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void allocateStackSpace4SpilledLRs();
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RegStackOffsets & getStackOffsets() {
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return StackOffsets;
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}
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inline void constructLiveRanges()
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{ LRI.constructLiveRanges(); }
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@ -212,7 +140,7 @@ class PhyRegAlloc
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public:
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PhyRegAlloc(const Method *const M, const TargetMachine& TM,
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PhyRegAlloc(Method *const M, const TargetMachine& TM,
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MethodLiveVarInfo *const Lvi);
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void allocateRegisters(); // main method called for allocatin
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@ -1,7 +1,23 @@
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#include "llvm/CodeGen/PhyRegAlloc.h"
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// $Id$
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//***************************************************************************
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// File:
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// PhyRegAlloc.cpp
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//
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// Purpose:
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// Register allocation for LLVM.
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//
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// History:
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// 9/10/01 - Ruchira Sasanka - created.
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//**************************************************************************/
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//***TODO: There are several places we add instructions. Validate the order
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// of adding these instructions.
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#include "llvm/CodeGen/PhyRegAlloc.h"
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#include "llvm/CodeGen/MachineInstr.h"
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#include "llvm/Target/TargetMachine.h"
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#include "llvm/Target/MachineFrameInfo.h"
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// ***TODO: There are several places we add instructions. Validate the order
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// of adding these instructions.
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@ -15,15 +31,18 @@ cl::Enum<RegAllocDebugLevel_t> DEBUG_RA("dregalloc", cl::NoFlags,
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//----------------------------------------------------------------------------
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// Constructor: Init local composite objects and create register classes.
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//----------------------------------------------------------------------------
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PhyRegAlloc::PhyRegAlloc(const Method *const M,
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PhyRegAlloc::PhyRegAlloc(Method *M,
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const TargetMachine& tm,
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MethodLiveVarInfo *const Lvi)
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: RegClassList(),
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Meth(M), TM(tm), LVI(Lvi), LRI(M, tm, RegClassList),
|
||||
TM(tm),
|
||||
Meth(M),
|
||||
mcInfo(MachineCodeForMethod::get(M)),
|
||||
LVI(Lvi), LRI(M, tm, RegClassList),
|
||||
MRI( tm.getRegInfo() ),
|
||||
NumOfRegClasses(MRI.getNumOfRegClasses()),
|
||||
AddedInstrMap(), StackOffsets() /*, PhiInstList()*/
|
||||
|
||||
AddedInstrMap()
|
||||
/*, PhiInstList()*/
|
||||
{
|
||||
// **TODO: use an actual reserved color list
|
||||
ReservedColorListType *RCL = new ReservedColorListType();
|
||||
@ -31,10 +50,6 @@ PhyRegAlloc::PhyRegAlloc(const Method *const M,
|
||||
// create each RegisterClass and put in RegClassList
|
||||
for( unsigned int rc=0; rc < NumOfRegClasses; rc++)
|
||||
RegClassList.push_back( new RegClass(M, MRI.getMachineRegClass(rc), RCL) );
|
||||
|
||||
// **TODO: Init to the correct value. Also reset this to the correct
|
||||
// value at the start of each instruction. Need a way to track max used
|
||||
int curOffset4TmpSpills =0 ;
|
||||
}
|
||||
|
||||
//----------------------------------------------------------------------------
|
||||
@ -318,125 +333,6 @@ void PhyRegAlloc::addInterferencesForArgs()
|
||||
}
|
||||
|
||||
|
||||
|
||||
#if 0
|
||||
|
||||
//----------------------------------------------------------------------------
|
||||
// This method inserts caller saving/restoring instructons before/after
|
||||
// a call machine instruction.
|
||||
//----------------------------------------------------------------------------
|
||||
|
||||
|
||||
void PhyRegAlloc::insertCallerSavingCode(const MachineInstr *MInst,
|
||||
const BasicBlock *BB )
|
||||
{
|
||||
// assert( (TM.getInstrInfo()).isCall( MInst->getOpCode() ) );
|
||||
|
||||
StackOffsets.resetTmpPos();
|
||||
|
||||
hash_set<unsigned> PushedRegSet;
|
||||
|
||||
// Now find the LR of the return value of the call
|
||||
// The last *implicit operand* is the return value of a call
|
||||
// Insert it to to he PushedRegSet since we must not save that register
|
||||
// and restore it after the call.
|
||||
// We do this because, we look at the LV set *after* the instruction
|
||||
// to determine, which LRs must be saved across calls. The return value
|
||||
// of the call is live in this set - but we must not save/restore it.
|
||||
|
||||
|
||||
const Value *RetVal = MRI.getCallInstRetVal( MInst );
|
||||
|
||||
if( RetVal ) {
|
||||
|
||||
LiveRange *RetValLR = LRI.getLiveRangeForValue( RetVal );
|
||||
assert( RetValLR && "No LR for RetValue of call");
|
||||
|
||||
PushedRegSet.insert(
|
||||
MRI.getUnifiedRegNum((RetValLR->getRegClass())->getID(),
|
||||
RetValLR->getColor() ) );
|
||||
}
|
||||
|
||||
|
||||
const LiveVarSet *LVSetAft = LVI->getLiveVarSetAfterMInst(MInst, BB);
|
||||
|
||||
LiveVarSet::const_iterator LIt = LVSetAft->begin();
|
||||
|
||||
// for each live var in live variable set after machine inst
|
||||
for( ; LIt != LVSetAft->end(); ++LIt) {
|
||||
|
||||
// get the live range corresponding to live var
|
||||
LiveRange *const LR = LRI.getLiveRangeForValue(*LIt );
|
||||
|
||||
// LR can be null if it is a const since a const
|
||||
// doesn't have a dominating def - see Assumptions above
|
||||
if( LR ) {
|
||||
|
||||
if( LR->hasColor() ) {
|
||||
|
||||
unsigned RCID = (LR->getRegClass())->getID();
|
||||
unsigned Color = LR->getColor();
|
||||
|
||||
if ( MRI.isRegVolatile(RCID, Color) ) {
|
||||
|
||||
// if the value is in both LV sets (i.e., live before and after
|
||||
// the call machine instruction)
|
||||
|
||||
unsigned Reg = MRI.getUnifiedRegNum(RCID, Color);
|
||||
|
||||
if( PushedRegSet.find(Reg) == PushedRegSet.end() ) {
|
||||
|
||||
// if we haven't already pushed that register
|
||||
|
||||
unsigned RegType = MRI.getRegType( LR );
|
||||
|
||||
// Now get two instructions - to push on stack and pop from stack
|
||||
// and add them to InstrnsBefore and InstrnsAfter of the
|
||||
// call instruction
|
||||
|
||||
int StackOff = StackOffsets.getNewTmpPosOffFromSP();
|
||||
|
||||
/**** TODO
|
||||
|
||||
if( RegType == SaveViaIntReg) {
|
||||
|
||||
int FreeIntReg = getFreedIntReg(......)
|
||||
|
||||
|
||||
}
|
||||
*/
|
||||
|
||||
MachineInstr *AdIBef =
|
||||
MRI.cpReg2MemMI(Reg, MRI.getStackPointer(), StackOff, RegType );
|
||||
|
||||
MachineInstr *AdIAft =
|
||||
MRI.cpMem2RegMI(MRI.getStackPointer(), StackOff, Reg, RegType );
|
||||
|
||||
((AddedInstrMap[MInst])->InstrnsBefore).push_front(AdIBef);
|
||||
((AddedInstrMap[MInst])->InstrnsAfter).push_back(AdIAft);
|
||||
|
||||
PushedRegSet.insert( Reg );
|
||||
|
||||
if(DEBUG_RA) {
|
||||
cerr << "\nFor callee save call inst:" << *MInst;
|
||||
cerr << "\n -inserted caller saving instrs:\n\t ";
|
||||
cerr << *AdIBef << "\n\t" << *AdIAft ;
|
||||
}
|
||||
} // if not already pushed
|
||||
|
||||
} // if LR has a volatile color
|
||||
|
||||
} // if LR has color
|
||||
|
||||
} // if there is a LR for Var
|
||||
|
||||
} // for each value in the LV set after instruction
|
||||
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
|
||||
//----------------------------------------------------------------------------
|
||||
// This method is called after register allocation is complete to set the
|
||||
// allocated reisters in the machine code. This code will add register numbers
|
||||
@ -490,8 +386,8 @@ void PhyRegAlloc::updateMachineCode()
|
||||
|
||||
// reset the stack offset for temporary variables since we may
|
||||
// need that to spill
|
||||
StackOffsets.resetTmpPos();
|
||||
|
||||
mcInfo.popAllTempValues(TM);
|
||||
|
||||
//for(MachineInstr::val_op_const_iterator OpI(MInst);!OpI.done();++OpI) {
|
||||
|
||||
for(unsigned OpNum=0; OpNum < MInst->getNumOperands(); ++OpNum) {
|
||||
@ -607,82 +503,6 @@ void PhyRegAlloc::updateMachineCode()
|
||||
}
|
||||
|
||||
|
||||
|
||||
#if 0
|
||||
|
||||
|
||||
//----------------------------------------------------------------------------
|
||||
// This method inserts spill code for AN operand whose LR was spilled.
|
||||
// This method may be called several times for a single machine instruction
|
||||
// if it contains many spilled operands. Each time it is called, it finds
|
||||
// a register which is not live at that instruction and also which is not
|
||||
// used by other spilled operands of the same instruction. Then it uses
|
||||
// this register temporarily to accomodate the spilled value.
|
||||
//----------------------------------------------------------------------------
|
||||
void PhyRegAlloc::insertCode4SpilledLR(const LiveRange *LR,
|
||||
const MachineInstr *MInst,
|
||||
const BasisBlock *BB,
|
||||
const unsigned OpNum) {
|
||||
|
||||
MachineOperand& Op = MInst->getOperand(OpNum);
|
||||
bool isDef = MInst->operandIsDefined(OpNum);
|
||||
unsigned RegType = MRI.getRegType( LR );
|
||||
int SpillOff = LR->getSpillOffFromFP();
|
||||
RegClass *RC = LR->getRegClass();
|
||||
const LiveVarSet *LVSetBef = LVI->getLiveVarSetBeforeMInst(MInst, BB);
|
||||
int TmpOff = StackOffsets.getNewTmpPosOffFromSP();
|
||||
MachineInstr *MIBef, *AdIMid, *MIAft;
|
||||
int TmpReg;
|
||||
|
||||
TmpReg = getUsableRegAtMI(RC, RegType, MInst,LVSetBef, MIBef, MIAft);
|
||||
TmpReg = getUnifiedRegNum( RC->getID(), TmpReg );
|
||||
|
||||
|
||||
if( !isDef ) {
|
||||
|
||||
// for a USE, we have to load the value of LR from stack to a TmpReg
|
||||
// and use the TmpReg as one operand of instruction
|
||||
|
||||
// actual loading instruction
|
||||
AdIMid = MRI.cpMem2RegMI(MRI.getFramePointer(), SpillOff, TmpReg, RegType);
|
||||
|
||||
if( MIBef )
|
||||
((AddedInstrMap[MInst])->InstrnsBefore).push_back(MIBef);
|
||||
|
||||
((AddedInstrMap[MInst])->InstrnsBefore).push_back(AdiMid);
|
||||
|
||||
if( MIAft)
|
||||
((AddedInstrMap[MInst])->InstrnsAfter).push_front(MIAft);
|
||||
|
||||
|
||||
}
|
||||
else { // if this is a Def
|
||||
|
||||
// for a DEF, we have to store the value produced by this instruction
|
||||
// on the stack position allocated for this LR
|
||||
|
||||
// actual storing instruction
|
||||
AdIMid = MRI.cpReg2MemMI(TmpReg, MRI.getFramePointer(), SpillOff, RegType);
|
||||
|
||||
if( MIBef )
|
||||
((AddedInstrMap[MInst])->InstrnsBefore).push_back(MIBef);
|
||||
|
||||
((AddedInstrMap[MInst])->InstrnsBefore).push_back(AdiMid);
|
||||
|
||||
if( MIAft)
|
||||
((AddedInstrMap[MInst])->InstrnsAfter).push_front(MIAft);
|
||||
|
||||
} // if !DEF
|
||||
|
||||
|
||||
Op.setRegForValue( TmpReg ); // set the opearnd
|
||||
|
||||
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
|
||||
//----------------------------------------------------------------------------
|
||||
// We can use the following method to get a temporary register to be used
|
||||
// BEFORE any given machine instruction. If there is a register available,
|
||||
@ -710,8 +530,9 @@ int PhyRegAlloc::getUsableRegAtMI(RegClass *RC,
|
||||
// we couldn't find an unused register. Generate code to free up a reg by
|
||||
// saving it on stack and restoring after the instruction
|
||||
|
||||
int TmpOff = StackOffsets.getNewTmpPosOffFromFP();
|
||||
|
||||
/**** NOTE: THIS SHOULD USE THE RIGHT SIZE FOR THE REG BEING PUSHED ****/
|
||||
int TmpOff = mcInfo.pushTempValue(TM, /*size*/ 8);
|
||||
|
||||
Reg = getRegNotUsedByThisInst(RC, MInst);
|
||||
MIBef = MRI.cpReg2MemMI(Reg, MRI.getFramePointer(), TmpOff, RegType );
|
||||
MIAft = MRI.cpMem2RegMI(MRI.getFramePointer(), TmpOff, Reg, RegType );
|
||||
@ -1011,8 +832,8 @@ void PhyRegAlloc::colorCallRetArgs()
|
||||
|
||||
// Tmp stack poistions are needed by some calls that have spilled args
|
||||
// So reset it before we call each such method
|
||||
StackOffsets.resetTmpPos();
|
||||
|
||||
mcInfo.popAllTempValues(TM);
|
||||
|
||||
if( (TM.getInstrInfo()).isCall( OpCode ) )
|
||||
MRI.colorCallArgs( CRMI, LRI, AI, *this );
|
||||
|
||||
@ -1112,17 +933,13 @@ void PhyRegAlloc::allocateStackSpace4SpilledLRs()
|
||||
LiveRangeMapType::const_iterator HMIEnd = (LRI.getLiveRangeMap())->end();
|
||||
|
||||
for( ; HMI != HMIEnd ; ++HMI ) {
|
||||
|
||||
if( (*HMI).first ) {
|
||||
LiveRange *L = (*HMI).second; // get the LiveRange
|
||||
if(L)
|
||||
if( ! L->hasColor() )
|
||||
L->setSpillOffFromFP( StackOffsets.getNewSpillOffFromFP() );
|
||||
L->setSpillOffFromFP(mcInfo.allocateSpilledValue(TM,L->getType()));
|
||||
}
|
||||
} // for all LR's in hash map
|
||||
|
||||
StackOffsets.setEndOfSpillRegion();
|
||||
|
||||
}
|
||||
|
||||
|
||||
@ -1195,7 +1012,7 @@ void PhyRegAlloc::allocateRegisters()
|
||||
|
||||
updateMachineCode();
|
||||
if (DEBUG_RA) {
|
||||
Meth->getMachineCode().dump();
|
||||
MachineCodeForMethod::get(Meth).dump();
|
||||
printMachineCode(); // only for DEBUGGING
|
||||
}
|
||||
}
|
||||
|
||||
@ -62,73 +62,6 @@ typedef hash_map<const MachineInstr *, AddedInstrns *> AddedInstrMapType;
|
||||
|
||||
|
||||
|
||||
//----------------------------------------------------------------------------
|
||||
// Class RegStackOffsets:
|
||||
// This class is responsible for managing stack frame of the method for
|
||||
// register allocation.
|
||||
//
|
||||
//----------------------------------------------------------------------------
|
||||
|
||||
class RegStackOffsets {
|
||||
|
||||
private:
|
||||
int curSpilledVarOff; // cur pos of spilled LRs
|
||||
int curNewTmpPosOffset; // cur pos of tmp values on stack
|
||||
bool isTmpRegionUsable; // can we call getNewTmpPosOffFromFP
|
||||
|
||||
const int SizeOfStackItem; // size of an item on stack
|
||||
const int StackSpillStartFromFP; // start position of spill region
|
||||
int StartOfTmpRegion; // start of the tmp var region
|
||||
|
||||
public:
|
||||
|
||||
// constructor
|
||||
|
||||
RegStackOffsets(int SEnSize=8, int StartSpill=176 ) :
|
||||
SizeOfStackItem(SEnSize), StackSpillStartFromFP(StartSpill) {
|
||||
|
||||
curSpilledVarOff = StartSpill;
|
||||
isTmpRegionUsable = false;
|
||||
};
|
||||
|
||||
|
||||
int getNewSpillOffFromFP() {
|
||||
int tmp = curSpilledVarOff;
|
||||
curSpilledVarOff += SizeOfStackItem;
|
||||
return tmp; // **TODO: Is sending un-incremented value correct?
|
||||
};
|
||||
|
||||
|
||||
// The following method must be called only after allocating space
|
||||
// for spilled LRs and calling setEndOfSpillRegion()
|
||||
int getNewTmpPosOffFromFP() {
|
||||
assert( isTmpRegionUsable && "Spill region still open");
|
||||
int tmp = curNewTmpPosOffset;
|
||||
curNewTmpPosOffset += SizeOfStackItem;
|
||||
return tmp; //**TODO: Is sending un-incremented val correct?
|
||||
};
|
||||
|
||||
|
||||
// This method is called when we have allocated space for all spilled
|
||||
// LRs. The tmp region can be used only after a call to this method.
|
||||
|
||||
void setEndOfSpillRegion() {
|
||||
assert(( ! isTmpRegionUsable) && "setEndOfSpillRegion called again");
|
||||
isTmpRegionUsable = true;
|
||||
StartOfTmpRegion = curSpilledVarOff;
|
||||
}
|
||||
|
||||
|
||||
// called when temporary values allocated on stack are no longer needed
|
||||
void resetTmpPos() {
|
||||
curNewTmpPosOffset = StartOfTmpRegion;
|
||||
}
|
||||
|
||||
|
||||
};
|
||||
|
||||
|
||||
|
||||
//----------------------------------------------------------------------------
|
||||
// class PhyRegAlloc:
|
||||
// Main class the register allocator. Call allocateRegisters() to allocate
|
||||
@ -136,12 +69,13 @@ class RegStackOffsets {
|
||||
//----------------------------------------------------------------------------
|
||||
|
||||
|
||||
class PhyRegAlloc
|
||||
class PhyRegAlloc: public NonCopyable
|
||||
{
|
||||
|
||||
vector<RegClass *> RegClassList ; // vector of register classes
|
||||
const Method *const Meth; // name of the method we work on
|
||||
const TargetMachine &TM; // target machine
|
||||
const Method* Meth; // name of the method we work on
|
||||
MachineCodeForMethod& mcInfo; // descriptor for method's native code
|
||||
MethodLiveVarInfo *const LVI; // LV information for this method
|
||||
// (already computed for BBs)
|
||||
LiveRangeInfo LRI; // LR info (will be computed)
|
||||
@ -154,8 +88,6 @@ class PhyRegAlloc
|
||||
|
||||
AddedInstrMapType AddedInstrMap; // to store instrns added in this phase
|
||||
|
||||
RegStackOffsets StackOffsets;
|
||||
|
||||
//vector<const MachineInstr *> PhiInstList; // a list of all phi instrs
|
||||
|
||||
//------- private methods ---------------------------------------------------
|
||||
@ -178,10 +110,6 @@ class PhyRegAlloc
|
||||
void markUnusableSugColors();
|
||||
void allocateStackSpace4SpilledLRs();
|
||||
|
||||
RegStackOffsets & getStackOffsets() {
|
||||
return StackOffsets;
|
||||
}
|
||||
|
||||
|
||||
inline void constructLiveRanges()
|
||||
{ LRI.constructLiveRanges(); }
|
||||
@ -212,7 +140,7 @@ class PhyRegAlloc
|
||||
|
||||
public:
|
||||
|
||||
PhyRegAlloc(const Method *const M, const TargetMachine& TM,
|
||||
PhyRegAlloc(Method *const M, const TargetMachine& TM,
|
||||
MethodLiveVarInfo *const Lvi);
|
||||
|
||||
void allocateRegisters(); // main method called for allocatin
|
||||
|
||||
Loading…
Reference in New Issue
Block a user