diff --git a/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp b/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp index f080fa81e94..fc2aa7526b7 100644 --- a/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp +++ b/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp @@ -136,9 +136,10 @@ static void printSOImm(raw_ostream &O, int64_t V, raw_ostream *CommentStream, unsigned Rot = ARM_AM::getSOImmValRot(V); // Print low-level immediate formation info, per - // A5.1.3: "Data-processing operands - Immediate". + // A5.2.3: Data-processing (immediate), and + // A5.2.4: Modified immediate constants in ARM instructions if (Rot) { - O << "#" << Imm << ", " << Rot; + O << "#" << Imm << ", #" << Rot; // Pretty printed version. if (CommentStream) *CommentStream << (int)ARM_AM::rotr32(Imm, Rot) << "\n"; diff --git a/test/MC/ARM/simple-encoding.ll b/test/MC/ARM/simple-encoding.ll index defeea947d5..7b581b3279f 100644 --- a/test/MC/ARM/simple-encoding.ll +++ b/test/MC/ARM/simple-encoding.ll @@ -39,7 +39,7 @@ define i32 @f3(i32 %a, i32 %b) { define i32 @f4(i32 %a, i32 %b) { ; CHECK: f4 -; CHECK: add r0, r0, #254, 28 @ encoding: [0xfe,0x0e,0x80,0xe2] +; CHECK: add r0, r0, #254, #28 @ encoding: [0xfe,0x0e,0x80,0xe2] ; CHECK: @ 4064 ; CHECK: bx lr @ encoding: [0x1e,0xff,0x2f,0xe1] %add = add nsw i32 %a, 4064 @@ -118,7 +118,7 @@ define i32 @f12(i32 %a) { define i64 @f13() { ; CHECK: f13: ; CHECK: mvn r0, #0 @ encoding: [0x00,0x00,0xe0,0xe3] -; CHECK: mvn r1, #2, 2 @ encoding: [0x02,0x11,0xe0,0xe3] +; CHECK: mvn r1, #2, #2 @ encoding: [0x02,0x11,0xe0,0xe3] ret i64 9223372036854775807 } @@ -229,7 +229,7 @@ define i32 @f23(i32 %X, i32 %Y) { define void @f24(i32 %a) { ; CHECK: f24 -; CHECK: cmp r0, #1, 16 @ encoding: [0x01,0x08,0x50,0xe3] +; CHECK: cmp r0, #1, #16 @ encoding: [0x01,0x08,0x50,0xe3] %b = icmp ugt i32 %a, 65536 br i1 %b, label %r, label %r r: diff --git a/test/MC/Disassembler/ARM/arm-tests.txt b/test/MC/Disassembler/ARM/arm-tests.txt index 8a8bcdde932..ac0165540ee 100644 --- a/test/MC/Disassembler/ARM/arm-tests.txt +++ b/test/MC/Disassembler/ARM/arm-tests.txt @@ -1,6 +1,6 @@ # RUN: llvm-mc --disassemble %s -triple=arm-apple-darwin9 | FileCheck %s -# CHECK: addpl r4, pc, #19, 8 +# CHECK: addpl r4, pc, #19, #8 0x4c 0x45 0x8f 0x52 # CHECK: b #0 @@ -66,7 +66,7 @@ # CHECK: movt r8, #65535 0xff 0x8f 0x4f 0xe3 -# CHECK: mvnspl r7, #245, 2 +# CHECK: mvnspl r7, #245, #2 0xf5 0x71 0xf0 0x53 # CHECK-NOT: orr r7, r8, r7, rrx #0 @@ -143,7 +143,7 @@ # CHECK: msr cpsr_fc, r0 0x00 0xf0 0x29 0xe1 -# CHECK: msrmi cpsr_c, #241, 8 +# CHECK: msrmi cpsr_c, #241, #8 0xf1 0xf4 0x21 0x43 # CHECK: rsbs r6, r7, r8