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Enable the instruction printer in HexagonMCTargetDesc
This adds the MCInstPrinter to the LLVMHexagonDesc library and removes the dependency LLVMHexagonAsmPrinter had on LLVMHexagonDesc. This is a prerequisite needed by the disassembler. Phabricator Revision: http://reviews.llvm.org/D5734 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219826 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -29,6 +29,43 @@ using namespace llvm;
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#include "HexagonGenAsmWriter.inc"
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const char HexagonInstPrinter::PacketPadding = '\t';
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// Return the minimum value that a constant extendable operand can have
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// without being extended.
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static int getMinValue(uint64_t TSFlags) {
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unsigned isSigned =
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(TSFlags >> HexagonII::ExtentSignedPos) & HexagonII::ExtentSignedMask;
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unsigned bits =
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(TSFlags >> HexagonII::ExtentBitsPos) & HexagonII::ExtentBitsMask;
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if (isSigned)
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return -1U << (bits - 1);
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else
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return 0;
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}
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// Return the maximum value that a constant extendable operand can have
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// without being extended.
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static int getMaxValue(uint64_t TSFlags) {
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unsigned isSigned =
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(TSFlags >> HexagonII::ExtentSignedPos) & HexagonII::ExtentSignedMask;
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unsigned bits =
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(TSFlags >> HexagonII::ExtentBitsPos) & HexagonII::ExtentBitsMask;
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if (isSigned)
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return ~(-1U << (bits - 1));
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else
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return ~(-1U << bits);
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}
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// Return true if the instruction must be extended.
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static bool isExtended(uint64_t TSFlags) {
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return (TSFlags >> HexagonII::ExtendedPos) & HexagonII::ExtendedMask;
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}
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// Return true if the instruction may be extended based on the operand value.
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static bool isExtendable(uint64_t TSFlags) {
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return (TSFlags >> HexagonII::ExtendablePos) & HexagonII::ExtendableMask;
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}
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StringRef HexagonInstPrinter::getOpcodeName(unsigned Opcode) const {
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return MII.getName(Opcode);
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@ -116,9 +153,20 @@ void HexagonInstPrinter::printImmOperand(const MCInst *MI, unsigned OpNo,
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void HexagonInstPrinter::printExtOperand(const MCInst *MI, unsigned OpNo,
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raw_ostream &O) const {
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const HexagonMCInst *HMCI = static_cast<const HexagonMCInst*>(MI);
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if (HMCI->isConstExtended())
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const MCOperand &MO = MI->getOperand(OpNo);
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const MCInstrDesc &MII = getMII().get(MI->getOpcode());
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assert((isExtendable(MII.TSFlags) || isExtended(MII.TSFlags)) &&
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"Expecting an extendable operand");
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if (MO.isExpr() || isExtended(MII.TSFlags)) {
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O << "#";
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} else if (MO.isImm()) {
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int ImmValue = MO.getImm();
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if (ImmValue < getMinValue(MII.TSFlags) ||
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ImmValue > getMaxValue(MII.TSFlags))
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O << "#";
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}
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printOperand(MI, OpNo, O);
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}
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@ -19,5 +19,5 @@
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type = Library
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name = HexagonAsmPrinter
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parent = Hexagon
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required_libraries = HexagonDesc MC Support
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required_libraries = MC Support
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add_to_library_groups = Hexagon
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@ -74,6 +74,14 @@ static MCCodeGenInfo *createHexagonMCCodeGenInfo(StringRef TT, Reloc::Model RM,
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X->InitMCCodeGenInfo(Reloc::Static, CM, OL);
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return X;
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}
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static MCInstPrinter *createHexagonMCInstPrinter(const Target &T,
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unsigned SyntaxVariant,
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const MCAsmInfo &MAI,
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const MCInstrInfo &MII,
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const MCRegisterInfo &MRI,
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const MCSubtargetInfo &STI) {
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return new HexagonInstPrinter(MAI, MII, MRI);
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}
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// Force static initialization.
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extern "C" void LLVMInitializeHexagonTargetMC() {
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@ -99,4 +107,8 @@ extern "C" void LLVMInitializeHexagonTargetMC() {
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// Register the MC Code Emitter
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TargetRegistry::RegisterMCCodeEmitter(TheHexagonTarget,
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createHexagonMCCodeEmitter);
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// Register the MC Inst Printer
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TargetRegistry::RegisterMCInstPrinter(TheHexagonTarget,
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createHexagonMCInstPrinter);
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}
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@ -19,5 +19,5 @@
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type = Library
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name = HexagonDesc
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parent = Hexagon
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required_libraries = HexagonInfo MC Support
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required_libraries = HexagonAsmPrinter HexagonInfo MC Support
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add_to_library_groups = Hexagon
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