diff --git a/lib/Target/ARM/ARMInstrThumb2.td b/lib/Target/ARM/ARMInstrThumb2.td index 16b7cb41f34..1e8d80aed29 100644 --- a/lib/Target/ARM/ARMInstrThumb2.td +++ b/lib/Target/ARM/ARMInstrThumb2.td @@ -275,7 +275,7 @@ multiclass T2I_rbin_irs opcod, string opc, PatFrag opnode> { // register def rr : T2sI<(outs rGPR:$dst), (ins rGPR:$rhs, rGPR:$lhs), IIC_iALUr, opc, "\t$dst, $rhs, $lhs", - [(set rGPR:$dst, (opnode rGPR:$lhs, rGPR:$rhs))]> { + [/* For disassembly only; pattern left blank */]> { let Inst{31-27} = 0b11101; let Inst{26-25} = 0b01; let Inst{24-21} = opcod;