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[x86][AVX512]
Add vscalef support include encoding and intrinsics review: http://reviews.llvm.org/D10730 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240906 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Asaf Badouh
parent
b23b2fbd3a
commit
13ce163855
@ -3831,6 +3831,26 @@ let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
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Intrinsic<[llvm_v2f64_ty], [llvm_v2f64_ty, llvm_v2f64_ty, llvm_v2f64_ty,
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llvm_i8_ty, llvm_i32_ty, llvm_i32_ty],
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[IntrNoMem]>;
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def int_x86_avx512_mask_scalef_pd_128 : GCCBuiltin<"__builtin_ia32_scalefpd128_mask">,
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Intrinsic<[llvm_v2f64_ty], [llvm_v2f64_ty, llvm_v2f64_ty,
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llvm_v2f64_ty, llvm_i8_ty], [IntrNoMem]>;
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def int_x86_avx512_mask_scalef_pd_256 : GCCBuiltin<"__builtin_ia32_scalefpd256_mask">,
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Intrinsic<[llvm_v4f64_ty], [llvm_v4f64_ty, llvm_v4f64_ty,
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llvm_v4f64_ty, llvm_i8_ty],[IntrNoMem]>;
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def int_x86_avx512_mask_scalef_pd_512 : GCCBuiltin<"__builtin_ia32_scalefpd512_mask">,
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Intrinsic<[llvm_v8f64_ty], [llvm_v8f64_ty, llvm_v8f64_ty,
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llvm_v8f64_ty, llvm_i8_ty, llvm_i32_ty], [IntrNoMem]>;
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def int_x86_avx512_mask_scalef_ps_128 : GCCBuiltin<"__builtin_ia32_scalefps128_mask">,
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Intrinsic<[llvm_v4f32_ty], [llvm_v4f32_ty, llvm_v4f32_ty,
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llvm_v4f32_ty, llvm_i8_ty], [IntrNoMem]>;
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def int_x86_avx512_mask_scalef_ps_256 : GCCBuiltin<"__builtin_ia32_scalefps256_mask">,
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Intrinsic<[llvm_v8f32_ty], [llvm_v8f32_ty, llvm_v8f32_ty,
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llvm_v8f32_ty, llvm_i8_ty], [IntrNoMem]>;
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def int_x86_avx512_mask_scalef_ps_512 : GCCBuiltin<"__builtin_ia32_scalefps512_mask">,
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Intrinsic<[llvm_v16f32_ty], [llvm_v16f32_ty, llvm_v16f32_ty,
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llvm_v16f32_ty, llvm_i16_ty, llvm_i32_ty], [IntrNoMem]>;
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def int_x86_avx512_sqrt_ss : GCCBuiltin<"__builtin_ia32_sqrtrndss">,
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Intrinsic<[llvm_v4f32_ty], [llvm_v4f32_ty, llvm_v4f32_ty],
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[IntrNoMem]>;
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@ -15084,6 +15084,23 @@ static SDValue LowerINTRINSIC_WO_CHAIN(SDValue Op, const X86Subtarget *Subtarget
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Src1,Src2),
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Mask, PassThru, Subtarget, DAG);
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}
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case INTR_TYPE_2OP_MASK_RM: {
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SDValue Src1 = Op.getOperand(1);
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SDValue Src2 = Op.getOperand(2);
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SDValue PassThru = Op.getOperand(3);
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SDValue Mask = Op.getOperand(4);
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// We specify 2 possible modes for intrinsics, with/without rounding modes.
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// First, we check if the intrinsic have rounding mode (6 operands),
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// if not, we set rounding mode to "current".
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SDValue Rnd;
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if (Op.getNumOperands() == 6)
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Rnd = Op.getOperand(5);
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else
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Rnd = DAG.getConstant(X86::STATIC_ROUNDING::CUR_DIRECTION, dl, MVT::i32);
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return getVectorMaskingNode(DAG.getNode(IntrData->Opc0, dl, VT,
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Src1, Src2, Rnd),
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Mask, PassThru, Subtarget, DAG);
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}
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case INTR_TYPE_3OP_MASK: {
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SDValue Src1 = Op.getOperand(1);
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SDValue Src2 = Op.getOperand(2);
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@ -18490,9 +18507,10 @@ const char *X86TargetLowering::getTargetNodeName(unsigned Opcode) const {
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case X86ISD::FDIV_RND: return "X86ISD::FDIV_RND";
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case X86ISD::FSQRT_RND: return "X86ISD::FSQRT_RND";
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case X86ISD::FGETEXP_RND: return "X86ISD::FGETEXP_RND";
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case X86ISD::SCALEF: return "X86ISD::SCALEF";
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case X86ISD::ADDS: return "X86ISD::ADDS";
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case X86ISD::SUBS: return "X86ISD::SUBS";
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case X86ISD::AVG: return "X86ISD::AVG";
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case X86ISD::AVG: return "X86ISD::AVG";
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case X86ISD::SINT_TO_FP_RND: return "X86ISD::SINT_TO_FP_RND";
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case X86ISD::UINT_TO_FP_RND: return "X86ISD::UINT_TO_FP_RND";
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}
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@ -211,7 +211,8 @@ namespace llvm {
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// FP vector get exponent
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FGETEXP_RND,
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// FP Scale
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SCALEF,
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// Integer add/sub with unsigned saturation.
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ADDUS,
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SUBUS,
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@ -3436,7 +3436,7 @@ multiclass avx512_fp_packed<bits<8> opc, string OpcodeStr, SDNode OpNode,
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}
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multiclass avx512_fp_round_packed<bits<8> opc, string OpcodeStr, SDNode OpNodeRnd,
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X86VectorVTInfo _, bit IsCommutable> {
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X86VectorVTInfo _> {
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defm rb: AVX512_maskable<opc, MRMSrcReg, _, (outs _.RC:$dst),
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(ins _.RC:$src1, _.RC:$src2, AVX512RC:$rc), OpcodeStr##_.Suffix,
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"$rc, $src2, $src1", "$src1, $src2, $rc",
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@ -3446,7 +3446,7 @@ multiclass avx512_fp_round_packed<bits<8> opc, string OpcodeStr, SDNode OpNodeRn
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multiclass avx512_fp_sae_packed<bits<8> opc, string OpcodeStr, SDNode OpNodeRnd,
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X86VectorVTInfo _, bit IsCommutable> {
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X86VectorVTInfo _> {
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defm rb: AVX512_maskable<opc, MRMSrcReg, _, (outs _.RC:$dst),
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(ins _.RC:$src1, _.RC:$src2), OpcodeStr##_.Suffix,
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"{sae}, $src2, $src1", "$src1, $src2, {sae}",
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@ -3481,16 +3481,16 @@ multiclass avx512_fp_binop_p<bits<8> opc, string OpcodeStr, SDNode OpNode,
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}
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multiclass avx512_fp_binop_p_round<bits<8> opc, string OpcodeStr, SDNode OpNodeRnd> {
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defm PSZ : avx512_fp_round_packed<opc, OpcodeStr, OpNodeRnd, v16f32_info, 0>,
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defm PSZ : avx512_fp_round_packed<opc, OpcodeStr, OpNodeRnd, v16f32_info>,
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EVEX_V512, PS, EVEX_CD8<32, CD8VF>;
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defm PDZ : avx512_fp_round_packed<opc, OpcodeStr, OpNodeRnd, v8f64_info, 0>,
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defm PDZ : avx512_fp_round_packed<opc, OpcodeStr, OpNodeRnd, v8f64_info>,
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EVEX_V512, PD, VEX_W,EVEX_CD8<64, CD8VF>;
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}
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multiclass avx512_fp_binop_p_sae<bits<8> opc, string OpcodeStr, SDNode OpNodeRnd> {
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defm PSZ : avx512_fp_sae_packed<opc, OpcodeStr, OpNodeRnd, v16f32_info, 0>,
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defm PSZ : avx512_fp_sae_packed<opc, OpcodeStr, OpNodeRnd, v16f32_info>,
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EVEX_V512, PS, EVEX_CD8<32, CD8VF>;
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defm PDZ : avx512_fp_sae_packed<opc, OpcodeStr, OpNodeRnd, v8f64_info, 0>,
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defm PDZ : avx512_fp_sae_packed<opc, OpcodeStr, OpNodeRnd, v8f64_info>,
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EVEX_V512, PD, VEX_W,EVEX_CD8<64, CD8VF>;
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}
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@ -3513,6 +3513,48 @@ let Predicates = [HasDQI] in {
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defm VXOR : avx512_fp_binop_p<0x57, "vxor", X86fxor, 1>;
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}
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multiclass avx512_fp_scalef_p<bits<8> opc, string OpcodeStr, SDNode OpNode,
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X86VectorVTInfo _> {
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defm rr: AVX512_maskable<opc, MRMSrcReg, _, (outs _.RC:$dst),
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(ins _.RC:$src1, _.RC:$src2), OpcodeStr##_.Suffix,
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"$src2, $src1", "$src1, $src2",
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(_.VT (OpNode _.RC:$src1, _.RC:$src2, (i32 FROUND_CURRENT)))>, EVEX_4V;
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let mayLoad = 1 in {
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defm rm: AVX512_maskable<opc, MRMSrcMem, _, (outs _.RC:$dst),
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(ins _.RC:$src1, _.MemOp:$src2), OpcodeStr##_.Suffix,
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"$src2, $src1", "$src1, $src2",
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(OpNode _.RC:$src1, (_.LdFrag addr:$src2), (i32 FROUND_CURRENT))>, EVEX_4V;
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defm rmb: AVX512_maskable<opc, MRMSrcMem, _, (outs _.RC:$dst),
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(ins _.RC:$src1, _.ScalarMemOp:$src2), OpcodeStr##_.Suffix,
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"${src2}"##_.BroadcastStr##", $src1",
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"$src1, ${src2}"##_.BroadcastStr,
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(OpNode _.RC:$src1, (_.VT (X86VBroadcast
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(_.ScalarLdFrag addr:$src2))), (i32 FROUND_CURRENT))>,
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EVEX_4V, EVEX_B;
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}//let mayLoad = 1
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}
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multiclass avx512_fp_scalef_all<bits<8> opc, string OpcodeStr, SDNode OpNode> {
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defm PSZ : avx512_fp_scalef_p<opc, OpcodeStr, OpNode, v16f32_info>,
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avx512_fp_round_packed<opc, OpcodeStr, OpNode, v16f32_info>,
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EVEX_V512, EVEX_CD8<32, CD8VF>;
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defm PDZ : avx512_fp_scalef_p<opc, OpcodeStr, OpNode, v8f64_info>,
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avx512_fp_round_packed<opc, OpcodeStr, OpNode, v8f64_info>,
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EVEX_V512, VEX_W, EVEX_CD8<64, CD8VF>;
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// Define only if AVX512VL feature is present.
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let Predicates = [HasVLX] in {
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defm PSZ128 : avx512_fp_scalef_p<opc, OpcodeStr, OpNode, v4f32x_info>,
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EVEX_V128, EVEX_CD8<32, CD8VF>;
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defm PSZ256 : avx512_fp_scalef_p<opc, OpcodeStr, OpNode, v8f32x_info>,
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EVEX_V256, EVEX_CD8<32, CD8VF>;
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defm PDZ128 : avx512_fp_scalef_p<opc, OpcodeStr, OpNode, v2f64x_info>,
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EVEX_V128, VEX_W, EVEX_CD8<64, CD8VF>;
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defm PDZ256 : avx512_fp_scalef_p<opc, OpcodeStr, OpNode, v4f64x_info>,
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EVEX_V256, VEX_W, EVEX_CD8<64, CD8VF>;
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}
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}
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defm VSCALEF : avx512_fp_scalef_all<0x2C, "vscalef", X86scalef>, T8PD;
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//===----------------------------------------------------------------------===//
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// AVX-512 VPTESTM instructions
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//===----------------------------------------------------------------------===//
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@ -311,6 +311,7 @@ def X86fsubRnd : SDNode<"X86ISD::FSUB_RND", SDTFPBinOpRound>;
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def X86fmulRnd : SDNode<"X86ISD::FMUL_RND", SDTFPBinOpRound>;
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def X86fdivRnd : SDNode<"X86ISD::FDIV_RND", SDTFPBinOpRound>;
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def X86fmaxRnd : SDNode<"X86ISD::FMAX_RND", SDTFPBinOpRound>;
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def X86scalef : SDNode<"X86ISD::SCALEF", SDTFPBinOpRound>;
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def X86fminRnd : SDNode<"X86ISD::FMIN_RND", SDTFPBinOpRound>;
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def X86fsqrtRnd : SDNode<"X86ISD::FSQRT_RND", SDTFPUnaryOpRound>;
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def X86fgetexpRnd : SDNode<"X86ISD::FGETEXP_RND", SDTFPUnaryOpRound>;
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@ -21,7 +21,7 @@ enum IntrinsicType {
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GATHER, SCATTER, PREFETCH, RDSEED, RDRAND, RDPMC, RDTSC, XTEST, ADX,
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INTR_TYPE_1OP, INTR_TYPE_2OP, INTR_TYPE_3OP,
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CMP_MASK, CMP_MASK_CC, VSHIFT, VSHIFT_MASK, COMI,
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INTR_TYPE_1OP_MASK, INTR_TYPE_1OP_MASK_RM, INTR_TYPE_2OP_MASK,
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INTR_TYPE_1OP_MASK, INTR_TYPE_1OP_MASK_RM, INTR_TYPE_2OP_MASK, INTR_TYPE_2OP_MASK_RM,
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INTR_TYPE_3OP_MASK, FMA_OP_MASK, FMA_OP_MASKZ, VPERM_3OP_MASK,
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VPERM_3OP_MASKZ,
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INTR_TYPE_SCALAR_MASK_RM, COMPRESS_EXPAND_IN_REG, COMPRESS_TO_MEM,
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@ -668,6 +668,18 @@ static const IntrinsicData IntrinsicsWithoutChain[] = {
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X86ISD::RNDSCALE, 0),
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X86_INTRINSIC_DATA(avx512_mask_rndscale_ss, INTR_TYPE_SCALAR_MASK_RM,
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X86ISD::RNDSCALE, 0),
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X86_INTRINSIC_DATA(avx512_mask_scalef_pd_128, INTR_TYPE_2OP_MASK_RM,
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X86ISD::SCALEF, 0),
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X86_INTRINSIC_DATA(avx512_mask_scalef_pd_256, INTR_TYPE_2OP_MASK_RM,
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X86ISD::SCALEF, 0),
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X86_INTRINSIC_DATA(avx512_mask_scalef_pd_512, INTR_TYPE_2OP_MASK_RM,
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X86ISD::SCALEF, 0),
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X86_INTRINSIC_DATA(avx512_mask_scalef_ps_128, INTR_TYPE_2OP_MASK_RM,
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X86ISD::SCALEF, 0),
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X86_INTRINSIC_DATA(avx512_mask_scalef_ps_256, INTR_TYPE_2OP_MASK_RM,
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X86ISD::SCALEF, 0),
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X86_INTRINSIC_DATA(avx512_mask_scalef_ps_512, INTR_TYPE_2OP_MASK_RM,
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X86ISD::SCALEF, 0),
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X86_INTRINSIC_DATA(avx512_mask_sqrt_pd_128, INTR_TYPE_1OP_MASK, ISD::FSQRT, 0),
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X86_INTRINSIC_DATA(avx512_mask_sqrt_pd_256, INTR_TYPE_1OP_MASK, ISD::FSQRT, 0),
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X86_INTRINSIC_DATA(avx512_mask_sqrt_pd_512, INTR_TYPE_1OP_MASK_RM, ISD::FSQRT,
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@ -3144,3 +3144,27 @@ define <16 x i32>@test_int_x86_avx512_mask_vpermt2var_d_512(<16 x i32> %x0, <16
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%res2 = add <16 x i32> %res, %res1
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ret <16 x i32> %res2
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}
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declare <8 x double> @llvm.x86.avx512.mask.scalef.pd.512(<8 x double>, <8 x double>, <8 x double>, i8, i32)
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; CHECK-LABEL: @test_int_x86_avx512_mask_scalef_pd_512
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; CHECK-NOT: call
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; CHECK: kmov
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; CHECK: vscalefpd{{.*}}{%k1}
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define <8 x double>@test_int_x86_avx512_mask_scalef_pd_512(<8 x double> %x0, <8 x double> %x1, <8 x double> %x2, i8 %x3) {
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%res = call <8 x double> @llvm.x86.avx512.mask.scalef.pd.512(<8 x double> %x0, <8 x double> %x1, <8 x double> %x2, i8 %x3, i32 3)
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%res1 = call <8 x double> @llvm.x86.avx512.mask.scalef.pd.512(<8 x double> %x0, <8 x double> %x1, <8 x double> %x2, i8 -1, i32 0)
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%res2 = fadd <8 x double> %res, %res1
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ret <8 x double> %res2
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}
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declare <16 x float> @llvm.x86.avx512.mask.scalef.ps.512(<16 x float>, <16 x float>, <16 x float>, i16, i32)
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; CHECK-LABEL: @test_int_x86_avx512_mask_scalef_ps_512
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; CHECK-NOT: call
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; CHECK: kmov
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; CHECK: vscalefps{{.*}}{%k1}
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define <16 x float>@test_int_x86_avx512_mask_scalef_ps_512(<16 x float> %x0, <16 x float> %x1, <16 x float> %x2, i16 %x3) {
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%res = call <16 x float> @llvm.x86.avx512.mask.scalef.ps.512(<16 x float> %x0, <16 x float> %x1, <16 x float> %x2, i16 %x3, i32 2)
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%res1 = call <16 x float> @llvm.x86.avx512.mask.scalef.ps.512(<16 x float> %x0, <16 x float> %x1, <16 x float> %x2, i16 -1, i32 0)
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%res2 = fadd <16 x float> %res, %res1
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ret <16 x float> %res2
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}
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@ -2954,3 +2954,53 @@ define <8 x i32>@test_int_x86_avx512_mask_pabs_d_256(<8 x i32> %x0, <8 x i32> %x
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ret <8 x i32> %res2
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}
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declare <2 x double> @llvm.x86.avx512.mask.scalef.pd.128(<2 x double>, <2 x double>, <2 x double>, i8)
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; CHECK-LABEL: @test_int_x86_avx512_mask_scalef_pd_128
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; CHECK-NOT: call
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; CHECK: kmov
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; CHECK: vscalefpd{{.*}}{%k1}
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define <2 x double>@test_int_x86_avx512_mask_scalef_pd_128(<2 x double> %x0, <2 x double> %x1, <2 x double> %x2, i8 %x3) {
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%res = call <2 x double> @llvm.x86.avx512.mask.scalef.pd.128(<2 x double> %x0, <2 x double> %x1, <2 x double> %x2, i8 %x3)
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%res1 = call <2 x double> @llvm.x86.avx512.mask.scalef.pd.128(<2 x double> %x0, <2 x double> %x1, <2 x double> %x2, i8 -1)
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%res2 = fadd <2 x double> %res, %res1
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ret <2 x double> %res2
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}
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declare <4 x double> @llvm.x86.avx512.mask.scalef.pd.256(<4 x double>, <4 x double>, <4 x double>, i8)
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; CHECK-LABEL: @test_int_x86_avx512_mask_scalef_pd_256
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; CHECK-NOT: call
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; CHECK: kmov
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; CHECK: vscalefpd{{.*}}{%k1}
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define <4 x double>@test_int_x86_avx512_mask_scalef_pd_256(<4 x double> %x0, <4 x double> %x1, <4 x double> %x2, i8 %x3) {
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%res = call <4 x double> @llvm.x86.avx512.mask.scalef.pd.256(<4 x double> %x0, <4 x double> %x1, <4 x double> %x2, i8 %x3)
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%res1 = call <4 x double> @llvm.x86.avx512.mask.scalef.pd.256(<4 x double> %x0, <4 x double> %x1, <4 x double> %x2, i8 -1)
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%res2 = fadd <4 x double> %res, %res1
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ret <4 x double> %res2
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}
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declare <4 x float> @llvm.x86.avx512.mask.scalef.ps.128(<4 x float>, <4 x float>, <4 x float>, i8)
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; CHECK-LABEL: @test_int_x86_avx512_mask_scalef_ps_128
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; CHECK-NOT: call
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; CHECK: kmov
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; CHECK: vscalefps{{.*}}{%k1}
|
||||
define <4 x float>@test_int_x86_avx512_mask_scalef_ps_128(<4 x float> %x0, <4 x float> %x1, <4 x float> %x2, i8 %x3) {
|
||||
%res = call <4 x float> @llvm.x86.avx512.mask.scalef.ps.128(<4 x float> %x0, <4 x float> %x1, <4 x float> %x2, i8 %x3)
|
||||
%res1 = call <4 x float> @llvm.x86.avx512.mask.scalef.ps.128(<4 x float> %x0, <4 x float> %x1, <4 x float> %x2, i8 -1)
|
||||
%res2 = fadd <4 x float> %res, %res1
|
||||
ret <4 x float> %res2
|
||||
}
|
||||
|
||||
declare <8 x float> @llvm.x86.avx512.mask.scalef.ps.256(<8 x float>, <8 x float>, <8 x float>, i8)
|
||||
; CHECK-LABEL: @test_int_x86_avx512_mask_scalef_ps_256
|
||||
; CHECK-NOT: call
|
||||
; CHECK: kmov
|
||||
; CHECK: vscalefps{{.*}}{%k1}
|
||||
define <8 x float>@test_int_x86_avx512_mask_scalef_ps_256(<8 x float> %x0, <8 x float> %x1, <8 x float> %x2, i8 %x3) {
|
||||
%res = call <8 x float> @llvm.x86.avx512.mask.scalef.ps.256(<8 x float> %x0, <8 x float> %x1, <8 x float> %x2, i8 %x3)
|
||||
%res1 = call <8 x float> @llvm.x86.avx512.mask.scalef.ps.256(<8 x float> %x0, <8 x float> %x1, <8 x float> %x2, i8 -1)
|
||||
%res2 = fadd <8 x float> %res, %res1
|
||||
ret <8 x float> %res2
|
||||
}
|
||||
@ -9905,3 +9905,146 @@ vpermilpd $0x23, 0x400(%rbx), %zmm2
|
||||
// CHECK: vpscatterqq %zmm14, 1024(%rcx,%zmm20,4) {%k1}
|
||||
// CHECK: encoding: [0x62,0x72,0xfd,0x41,0xa1,0xb4,0xa1,0x00,0x04,0x00,0x00]
|
||||
vpscatterqq %zmm14, 1024(%rcx,%zmm20,4) {%k1}
|
||||
// CHECK: vscalefpd %zmm28, %zmm26, %zmm26
|
||||
// CHECK: encoding: [0x62,0x02,0xad,0x40,0x2c,0xd4]
|
||||
vscalefpd %zmm28, %zmm26, %zmm26
|
||||
|
||||
// CHECK: vscalefpd %zmm28, %zmm26, %zmm26 {%k5}
|
||||
// CHECK: encoding: [0x62,0x02,0xad,0x45,0x2c,0xd4]
|
||||
vscalefpd %zmm28, %zmm26, %zmm26 {%k5}
|
||||
|
||||
// CHECK: vscalefpd %zmm28, %zmm26, %zmm26 {%k5} {z}
|
||||
// CHECK: encoding: [0x62,0x02,0xad,0xc5,0x2c,0xd4]
|
||||
vscalefpd %zmm28, %zmm26, %zmm26 {%k5} {z}
|
||||
|
||||
// CHECK: vscalefpd {rn-sae}, %zmm28, %zmm26, %zmm26
|
||||
// CHECK: encoding: [0x62,0x02,0xad,0x10,0x2c,0xd4]
|
||||
vscalefpd {rn-sae}, %zmm28, %zmm26, %zmm26
|
||||
|
||||
// CHECK: vscalefpd {ru-sae}, %zmm28, %zmm26, %zmm26
|
||||
// CHECK: encoding: [0x62,0x02,0xad,0x50,0x2c,0xd4]
|
||||
vscalefpd {ru-sae}, %zmm28, %zmm26, %zmm26
|
||||
|
||||
// CHECK: vscalefpd {rd-sae}, %zmm28, %zmm26, %zmm26
|
||||
// CHECK: encoding: [0x62,0x02,0xad,0x30,0x2c,0xd4]
|
||||
vscalefpd {rd-sae}, %zmm28, %zmm26, %zmm26
|
||||
|
||||
// CHECK: vscalefpd {rz-sae}, %zmm28, %zmm26, %zmm26
|
||||
// CHECK: encoding: [0x62,0x02,0xad,0x70,0x2c,0xd4]
|
||||
vscalefpd {rz-sae}, %zmm28, %zmm26, %zmm26
|
||||
|
||||
// CHECK: vscalefpd (%rcx), %zmm26, %zmm26
|
||||
// CHECK: encoding: [0x62,0x62,0xad,0x40,0x2c,0x11]
|
||||
vscalefpd (%rcx), %zmm26, %zmm26
|
||||
|
||||
// CHECK: vscalefpd 291(%rax,%r14,8), %zmm26, %zmm26
|
||||
// CHECK: encoding: [0x62,0x22,0xad,0x40,0x2c,0x94,0xf0,0x23,0x01,0x00,0x00]
|
||||
vscalefpd 291(%rax,%r14,8), %zmm26, %zmm26
|
||||
|
||||
// CHECK: vscalefpd (%rcx){1to8}, %zmm26, %zmm26
|
||||
// CHECK: encoding: [0x62,0x62,0xad,0x50,0x2c,0x11]
|
||||
vscalefpd (%rcx){1to8}, %zmm26, %zmm26
|
||||
|
||||
// CHECK: vscalefpd 8128(%rdx), %zmm26, %zmm26
|
||||
// CHECK: encoding: [0x62,0x62,0xad,0x40,0x2c,0x52,0x7f]
|
||||
vscalefpd 8128(%rdx), %zmm26, %zmm26
|
||||
|
||||
// CHECK: vscalefpd 8192(%rdx), %zmm26, %zmm26
|
||||
// CHECK: encoding: [0x62,0x62,0xad,0x40,0x2c,0x92,0x00,0x20,0x00,0x00]
|
||||
vscalefpd 8192(%rdx), %zmm26, %zmm26
|
||||
|
||||
// CHECK: vscalefpd -8192(%rdx), %zmm26, %zmm26
|
||||
// CHECK: encoding: [0x62,0x62,0xad,0x40,0x2c,0x52,0x80]
|
||||
vscalefpd -8192(%rdx), %zmm26, %zmm26
|
||||
|
||||
// CHECK: vscalefpd -8256(%rdx), %zmm26, %zmm26
|
||||
// CHECK: encoding: [0x62,0x62,0xad,0x40,0x2c,0x92,0xc0,0xdf,0xff,0xff]
|
||||
vscalefpd -8256(%rdx), %zmm26, %zmm26
|
||||
|
||||
// CHECK: vscalefpd 1016(%rdx){1to8}, %zmm26, %zmm26
|
||||
// CHECK: encoding: [0x62,0x62,0xad,0x50,0x2c,0x52,0x7f]
|
||||
vscalefpd 1016(%rdx){1to8}, %zmm26, %zmm26
|
||||
|
||||
// CHECK: vscalefpd 1024(%rdx){1to8}, %zmm26, %zmm26
|
||||
// CHECK: encoding: [0x62,0x62,0xad,0x50,0x2c,0x92,0x00,0x04,0x00,0x00]
|
||||
vscalefpd 1024(%rdx){1to8}, %zmm26, %zmm26
|
||||
|
||||
// CHECK: vscalefpd -1024(%rdx){1to8}, %zmm26, %zmm26
|
||||
// CHECK: encoding: [0x62,0x62,0xad,0x50,0x2c,0x52,0x80]
|
||||
vscalefpd -1024(%rdx){1to8}, %zmm26, %zmm26
|
||||
|
||||
// CHECK: vscalefpd -1032(%rdx){1to8}, %zmm26, %zmm26
|
||||
// CHECK: encoding: [0x62,0x62,0xad,0x50,0x2c,0x92,0xf8,0xfb,0xff,0xff]
|
||||
vscalefpd -1032(%rdx){1to8}, %zmm26, %zmm26
|
||||
|
||||
// CHECK: vscalefps %zmm18, %zmm6, %zmm19
|
||||
// CHECK: encoding: [0x62,0xa2,0x4d,0x48,0x2c,0xda]
|
||||
vscalefps %zmm18, %zmm6, %zmm19
|
||||
|
||||
// CHECK: vscalefps %zmm18, %zmm6, %zmm19 {%k6}
|
||||
// CHECK: encoding: [0x62,0xa2,0x4d,0x4e,0x2c,0xda]
|
||||
vscalefps %zmm18, %zmm6, %zmm19 {%k6}
|
||||
|
||||
// CHECK: vscalefps %zmm18, %zmm6, %zmm19 {%k6} {z}
|
||||
// CHECK: encoding: [0x62,0xa2,0x4d,0xce,0x2c,0xda]
|
||||
vscalefps %zmm18, %zmm6, %zmm19 {%k6} {z}
|
||||
|
||||
// CHECK: vscalefps {rn-sae}, %zmm18, %zmm6, %zmm19
|
||||
// CHECK: encoding: [0x62,0xa2,0x4d,0x18,0x2c,0xda]
|
||||
vscalefps {rn-sae}, %zmm18, %zmm6, %zmm19
|
||||
|
||||
// CHECK: vscalefps {ru-sae}, %zmm18, %zmm6, %zmm19
|
||||
// CHECK: encoding: [0x62,0xa2,0x4d,0x58,0x2c,0xda]
|
||||
vscalefps {ru-sae}, %zmm18, %zmm6, %zmm19
|
||||
|
||||
// CHECK: vscalefps {rd-sae}, %zmm18, %zmm6, %zmm19
|
||||
// CHECK: encoding: [0x62,0xa2,0x4d,0x38,0x2c,0xda]
|
||||
vscalefps {rd-sae}, %zmm18, %zmm6, %zmm19
|
||||
|
||||
// CHECK: vscalefps {rz-sae}, %zmm18, %zmm6, %zmm19
|
||||
// CHECK: encoding: [0x62,0xa2,0x4d,0x78,0x2c,0xda]
|
||||
vscalefps {rz-sae}, %zmm18, %zmm6, %zmm19
|
||||
|
||||
// CHECK: vscalefps (%rcx), %zmm6, %zmm19
|
||||
// CHECK: encoding: [0x62,0xe2,0x4d,0x48,0x2c,0x19]
|
||||
vscalefps (%rcx), %zmm6, %zmm19
|
||||
|
||||
// CHECK: vscalefps 291(%rax,%r14,8), %zmm6, %zmm19
|
||||
// CHECK: encoding: [0x62,0xa2,0x4d,0x48,0x2c,0x9c,0xf0,0x23,0x01,0x00,0x00]
|
||||
vscalefps 291(%rax,%r14,8), %zmm6, %zmm19
|
||||
|
||||
// CHECK: vscalefps (%rcx){1to16}, %zmm6, %zmm19
|
||||
// CHECK: encoding: [0x62,0xe2,0x4d,0x58,0x2c,0x19]
|
||||
vscalefps (%rcx){1to16}, %zmm6, %zmm19
|
||||
|
||||
// CHECK: vscalefps 8128(%rdx), %zmm6, %zmm19
|
||||
// CHECK: encoding: [0x62,0xe2,0x4d,0x48,0x2c,0x5a,0x7f]
|
||||
vscalefps 8128(%rdx), %zmm6, %zmm19
|
||||
|
||||
// CHECK: vscalefps 8192(%rdx), %zmm6, %zmm19
|
||||
// CHECK: encoding: [0x62,0xe2,0x4d,0x48,0x2c,0x9a,0x00,0x20,0x00,0x00]
|
||||
vscalefps 8192(%rdx), %zmm6, %zmm19
|
||||
|
||||
// CHECK: vscalefps -8192(%rdx), %zmm6, %zmm19
|
||||
// CHECK: encoding: [0x62,0xe2,0x4d,0x48,0x2c,0x5a,0x80]
|
||||
vscalefps -8192(%rdx), %zmm6, %zmm19
|
||||
|
||||
// CHECK: vscalefps -8256(%rdx), %zmm6, %zmm19
|
||||
// CHECK: encoding: [0x62,0xe2,0x4d,0x48,0x2c,0x9a,0xc0,0xdf,0xff,0xff]
|
||||
vscalefps -8256(%rdx), %zmm6, %zmm19
|
||||
|
||||
// CHECK: vscalefps 508(%rdx){1to16}, %zmm6, %zmm19
|
||||
// CHECK: encoding: [0x62,0xe2,0x4d,0x58,0x2c,0x5a,0x7f]
|
||||
vscalefps 508(%rdx){1to16}, %zmm6, %zmm19
|
||||
|
||||
// CHECK: vscalefps 512(%rdx){1to16}, %zmm6, %zmm19
|
||||
// CHECK: encoding: [0x62,0xe2,0x4d,0x58,0x2c,0x9a,0x00,0x02,0x00,0x00]
|
||||
vscalefps 512(%rdx){1to16}, %zmm6, %zmm19
|
||||
|
||||
// CHECK: vscalefps -512(%rdx){1to16}, %zmm6, %zmm19
|
||||
// CHECK: encoding: [0x62,0xe2,0x4d,0x58,0x2c,0x5a,0x80]
|
||||
vscalefps -512(%rdx){1to16}, %zmm6, %zmm19
|
||||
|
||||
// CHECK: vscalefps -516(%rdx){1to16}, %zmm6, %zmm19
|
||||
// CHECK: encoding: [0x62,0xe2,0x4d,0x58,0x2c,0x9a,0xfc,0xfd,0xff,0xff]
|
||||
vscalefps -516(%rdx){1to16}, %zmm6, %zmm19
|
||||
|
||||
@ -12028,3 +12028,227 @@ vaddpd {rz-sae}, %zmm2, %zmm1, %zmm1
|
||||
// CHECK: vpermt2pd -1032(%rdx){1to4}, %ymm23, %ymm17
|
||||
// CHECK: encoding: [0x62,0xe2,0xc5,0x30,0x7f,0x8a,0xf8,0xfb,0xff,0xff]
|
||||
vpermt2pd -1032(%rdx){1to4}, %ymm23, %ymm17
|
||||
|
||||
// CHECK: vscalefpd %xmm17, %xmm17, %xmm24
|
||||
// CHECK: encoding: [0x62,0x22,0xf5,0x00,0x2c,0xc1]
|
||||
vscalefpd %xmm17, %xmm17, %xmm24
|
||||
|
||||
// CHECK: vscalefpd %xmm17, %xmm17, %xmm24 {%k2}
|
||||
// CHECK: encoding: [0x62,0x22,0xf5,0x02,0x2c,0xc1]
|
||||
vscalefpd %xmm17, %xmm17, %xmm24 {%k2}
|
||||
|
||||
// CHECK: vscalefpd %xmm17, %xmm17, %xmm24 {%k2} {z}
|
||||
// CHECK: encoding: [0x62,0x22,0xf5,0x82,0x2c,0xc1]
|
||||
vscalefpd %xmm17, %xmm17, %xmm24 {%k2} {z}
|
||||
|
||||
// CHECK: vscalefpd (%rcx), %xmm17, %xmm24
|
||||
// CHECK: encoding: [0x62,0x62,0xf5,0x00,0x2c,0x01]
|
||||
vscalefpd (%rcx), %xmm17, %xmm24
|
||||
|
||||
// CHECK: vscalefpd 291(%rax,%r14,8), %xmm17, %xmm24
|
||||
// CHECK: encoding: [0x62,0x22,0xf5,0x00,0x2c,0x84,0xf0,0x23,0x01,0x00,0x00]
|
||||
vscalefpd 291(%rax,%r14,8), %xmm17, %xmm24
|
||||
|
||||
// CHECK: vscalefpd (%rcx){1to2}, %xmm17, %xmm24
|
||||
// CHECK: encoding: [0x62,0x62,0xf5,0x10,0x2c,0x01]
|
||||
vscalefpd (%rcx){1to2}, %xmm17, %xmm24
|
||||
|
||||
// CHECK: vscalefpd 2032(%rdx), %xmm17, %xmm24
|
||||
// CHECK: encoding: [0x62,0x62,0xf5,0x00,0x2c,0x42,0x7f]
|
||||
vscalefpd 2032(%rdx), %xmm17, %xmm24
|
||||
|
||||
// CHECK: vscalefpd 2048(%rdx), %xmm17, %xmm24
|
||||
// CHECK: encoding: [0x62,0x62,0xf5,0x00,0x2c,0x82,0x00,0x08,0x00,0x00]
|
||||
vscalefpd 2048(%rdx), %xmm17, %xmm24
|
||||
|
||||
// CHECK: vscalefpd -2048(%rdx), %xmm17, %xmm24
|
||||
// CHECK: encoding: [0x62,0x62,0xf5,0x00,0x2c,0x42,0x80]
|
||||
vscalefpd -2048(%rdx), %xmm17, %xmm24
|
||||
|
||||
// CHECK: vscalefpd -2064(%rdx), %xmm17, %xmm24
|
||||
// CHECK: encoding: [0x62,0x62,0xf5,0x00,0x2c,0x82,0xf0,0xf7,0xff,0xff]
|
||||
vscalefpd -2064(%rdx), %xmm17, %xmm24
|
||||
|
||||
// CHECK: vscalefpd 1016(%rdx){1to2}, %xmm17, %xmm24
|
||||
// CHECK: encoding: [0x62,0x62,0xf5,0x10,0x2c,0x42,0x7f]
|
||||
vscalefpd 1016(%rdx){1to2}, %xmm17, %xmm24
|
||||
|
||||
// CHECK: vscalefpd 1024(%rdx){1to2}, %xmm17, %xmm24
|
||||
// CHECK: encoding: [0x62,0x62,0xf5,0x10,0x2c,0x82,0x00,0x04,0x00,0x00]
|
||||
vscalefpd 1024(%rdx){1to2}, %xmm17, %xmm24
|
||||
|
||||
// CHECK: vscalefpd -1024(%rdx){1to2}, %xmm17, %xmm24
|
||||
// CHECK: encoding: [0x62,0x62,0xf5,0x10,0x2c,0x42,0x80]
|
||||
vscalefpd -1024(%rdx){1to2}, %xmm17, %xmm24
|
||||
|
||||
// CHECK: vscalefpd -1032(%rdx){1to2}, %xmm17, %xmm24
|
||||
// CHECK: encoding: [0x62,0x62,0xf5,0x10,0x2c,0x82,0xf8,0xfb,0xff,0xff]
|
||||
vscalefpd -1032(%rdx){1to2}, %xmm17, %xmm24
|
||||
|
||||
// CHECK: vscalefpd %ymm26, %ymm20, %ymm29
|
||||
// CHECK: encoding: [0x62,0x02,0xdd,0x20,0x2c,0xea]
|
||||
vscalefpd %ymm26, %ymm20, %ymm29
|
||||
|
||||
// CHECK: vscalefpd %ymm26, %ymm20, %ymm29 {%k2}
|
||||
// CHECK: encoding: [0x62,0x02,0xdd,0x22,0x2c,0xea]
|
||||
vscalefpd %ymm26, %ymm20, %ymm29 {%k2}
|
||||
|
||||
// CHECK: vscalefpd %ymm26, %ymm20, %ymm29 {%k2} {z}
|
||||
// CHECK: encoding: [0x62,0x02,0xdd,0xa2,0x2c,0xea]
|
||||
vscalefpd %ymm26, %ymm20, %ymm29 {%k2} {z}
|
||||
|
||||
// CHECK: vscalefpd (%rcx), %ymm20, %ymm29
|
||||
// CHECK: encoding: [0x62,0x62,0xdd,0x20,0x2c,0x29]
|
||||
vscalefpd (%rcx), %ymm20, %ymm29
|
||||
|
||||
// CHECK: vscalefpd 291(%rax,%r14,8), %ymm20, %ymm29
|
||||
// CHECK: encoding: [0x62,0x22,0xdd,0x20,0x2c,0xac,0xf0,0x23,0x01,0x00,0x00]
|
||||
vscalefpd 291(%rax,%r14,8), %ymm20, %ymm29
|
||||
|
||||
// CHECK: vscalefpd (%rcx){1to4}, %ymm20, %ymm29
|
||||
// CHECK: encoding: [0x62,0x62,0xdd,0x30,0x2c,0x29]
|
||||
vscalefpd (%rcx){1to4}, %ymm20, %ymm29
|
||||
|
||||
// CHECK: vscalefpd 4064(%rdx), %ymm20, %ymm29
|
||||
// CHECK: encoding: [0x62,0x62,0xdd,0x20,0x2c,0x6a,0x7f]
|
||||
vscalefpd 4064(%rdx), %ymm20, %ymm29
|
||||
|
||||
// CHECK: vscalefpd 4096(%rdx), %ymm20, %ymm29
|
||||
// CHECK: encoding: [0x62,0x62,0xdd,0x20,0x2c,0xaa,0x00,0x10,0x00,0x00]
|
||||
vscalefpd 4096(%rdx), %ymm20, %ymm29
|
||||
|
||||
// CHECK: vscalefpd -4096(%rdx), %ymm20, %ymm29
|
||||
// CHECK: encoding: [0x62,0x62,0xdd,0x20,0x2c,0x6a,0x80]
|
||||
vscalefpd -4096(%rdx), %ymm20, %ymm29
|
||||
|
||||
// CHECK: vscalefpd -4128(%rdx), %ymm20, %ymm29
|
||||
// CHECK: encoding: [0x62,0x62,0xdd,0x20,0x2c,0xaa,0xe0,0xef,0xff,0xff]
|
||||
vscalefpd -4128(%rdx), %ymm20, %ymm29
|
||||
|
||||
// CHECK: vscalefpd 1016(%rdx){1to4}, %ymm20, %ymm29
|
||||
// CHECK: encoding: [0x62,0x62,0xdd,0x30,0x2c,0x6a,0x7f]
|
||||
vscalefpd 1016(%rdx){1to4}, %ymm20, %ymm29
|
||||
|
||||
// CHECK: vscalefpd 1024(%rdx){1to4}, %ymm20, %ymm29
|
||||
// CHECK: encoding: [0x62,0x62,0xdd,0x30,0x2c,0xaa,0x00,0x04,0x00,0x00]
|
||||
vscalefpd 1024(%rdx){1to4}, %ymm20, %ymm29
|
||||
|
||||
// CHECK: vscalefpd -1024(%rdx){1to4}, %ymm20, %ymm29
|
||||
// CHECK: encoding: [0x62,0x62,0xdd,0x30,0x2c,0x6a,0x80]
|
||||
vscalefpd -1024(%rdx){1to4}, %ymm20, %ymm29
|
||||
|
||||
// CHECK: vscalefpd -1032(%rdx){1to4}, %ymm20, %ymm29
|
||||
// CHECK: encoding: [0x62,0x62,0xdd,0x30,0x2c,0xaa,0xf8,0xfb,0xff,0xff]
|
||||
vscalefpd -1032(%rdx){1to4}, %ymm20, %ymm29
|
||||
|
||||
// CHECK: vscalefps %xmm22, %xmm27, %xmm19
|
||||
// CHECK: encoding: [0x62,0xa2,0x25,0x00,0x2c,0xde]
|
||||
vscalefps %xmm22, %xmm27, %xmm19
|
||||
|
||||
// CHECK: vscalefps %xmm22, %xmm27, %xmm19 {%k4}
|
||||
// CHECK: encoding: [0x62,0xa2,0x25,0x04,0x2c,0xde]
|
||||
vscalefps %xmm22, %xmm27, %xmm19 {%k4}
|
||||
|
||||
// CHECK: vscalefps %xmm22, %xmm27, %xmm19 {%k4} {z}
|
||||
// CHECK: encoding: [0x62,0xa2,0x25,0x84,0x2c,0xde]
|
||||
vscalefps %xmm22, %xmm27, %xmm19 {%k4} {z}
|
||||
|
||||
// CHECK: vscalefps (%rcx), %xmm27, %xmm19
|
||||
// CHECK: encoding: [0x62,0xe2,0x25,0x00,0x2c,0x19]
|
||||
vscalefps (%rcx), %xmm27, %xmm19
|
||||
|
||||
// CHECK: vscalefps 291(%rax,%r14,8), %xmm27, %xmm19
|
||||
// CHECK: encoding: [0x62,0xa2,0x25,0x00,0x2c,0x9c,0xf0,0x23,0x01,0x00,0x00]
|
||||
vscalefps 291(%rax,%r14,8), %xmm27, %xmm19
|
||||
|
||||
// CHECK: vscalefps (%rcx){1to4}, %xmm27, %xmm19
|
||||
// CHECK: encoding: [0x62,0xe2,0x25,0x10,0x2c,0x19]
|
||||
vscalefps (%rcx){1to4}, %xmm27, %xmm19
|
||||
|
||||
// CHECK: vscalefps 2032(%rdx), %xmm27, %xmm19
|
||||
// CHECK: encoding: [0x62,0xe2,0x25,0x00,0x2c,0x5a,0x7f]
|
||||
vscalefps 2032(%rdx), %xmm27, %xmm19
|
||||
|
||||
// CHECK: vscalefps 2048(%rdx), %xmm27, %xmm19
|
||||
// CHECK: encoding: [0x62,0xe2,0x25,0x00,0x2c,0x9a,0x00,0x08,0x00,0x00]
|
||||
vscalefps 2048(%rdx), %xmm27, %xmm19
|
||||
|
||||
// CHECK: vscalefps -2048(%rdx), %xmm27, %xmm19
|
||||
// CHECK: encoding: [0x62,0xe2,0x25,0x00,0x2c,0x5a,0x80]
|
||||
vscalefps -2048(%rdx), %xmm27, %xmm19
|
||||
|
||||
// CHECK: vscalefps -2064(%rdx), %xmm27, %xmm19
|
||||
// CHECK: encoding: [0x62,0xe2,0x25,0x00,0x2c,0x9a,0xf0,0xf7,0xff,0xff]
|
||||
vscalefps -2064(%rdx), %xmm27, %xmm19
|
||||
|
||||
// CHECK: vscalefps 508(%rdx){1to4}, %xmm27, %xmm19
|
||||
// CHECK: encoding: [0x62,0xe2,0x25,0x10,0x2c,0x5a,0x7f]
|
||||
vscalefps 508(%rdx){1to4}, %xmm27, %xmm19
|
||||
|
||||
// CHECK: vscalefps 512(%rdx){1to4}, %xmm27, %xmm19
|
||||
// CHECK: encoding: [0x62,0xe2,0x25,0x10,0x2c,0x9a,0x00,0x02,0x00,0x00]
|
||||
vscalefps 512(%rdx){1to4}, %xmm27, %xmm19
|
||||
|
||||
// CHECK: vscalefps -512(%rdx){1to4}, %xmm27, %xmm19
|
||||
// CHECK: encoding: [0x62,0xe2,0x25,0x10,0x2c,0x5a,0x80]
|
||||
vscalefps -512(%rdx){1to4}, %xmm27, %xmm19
|
||||
|
||||
// CHECK: vscalefps -516(%rdx){1to4}, %xmm27, %xmm19
|
||||
// CHECK: encoding: [0x62,0xe2,0x25,0x10,0x2c,0x9a,0xfc,0xfd,0xff,0xff]
|
||||
vscalefps -516(%rdx){1to4}, %xmm27, %xmm19
|
||||
|
||||
// CHECK: vscalefps %ymm23, %ymm22, %ymm25
|
||||
// CHECK: encoding: [0x62,0x22,0x4d,0x20,0x2c,0xcf]
|
||||
vscalefps %ymm23, %ymm22, %ymm25
|
||||
|
||||
// CHECK: vscalefps %ymm23, %ymm22, %ymm25 {%k4}
|
||||
// CHECK: encoding: [0x62,0x22,0x4d,0x24,0x2c,0xcf]
|
||||
vscalefps %ymm23, %ymm22, %ymm25 {%k4}
|
||||
|
||||
// CHECK: vscalefps %ymm23, %ymm22, %ymm25 {%k4} {z}
|
||||
// CHECK: encoding: [0x62,0x22,0x4d,0xa4,0x2c,0xcf]
|
||||
vscalefps %ymm23, %ymm22, %ymm25 {%k4} {z}
|
||||
|
||||
// CHECK: vscalefps (%rcx), %ymm22, %ymm25
|
||||
// CHECK: encoding: [0x62,0x62,0x4d,0x20,0x2c,0x09]
|
||||
vscalefps (%rcx), %ymm22, %ymm25
|
||||
|
||||
// CHECK: vscalefps 291(%rax,%r14,8), %ymm22, %ymm25
|
||||
// CHECK: encoding: [0x62,0x22,0x4d,0x20,0x2c,0x8c,0xf0,0x23,0x01,0x00,0x00]
|
||||
vscalefps 291(%rax,%r14,8), %ymm22, %ymm25
|
||||
|
||||
// CHECK: vscalefps (%rcx){1to8}, %ymm22, %ymm25
|
||||
// CHECK: encoding: [0x62,0x62,0x4d,0x30,0x2c,0x09]
|
||||
vscalefps (%rcx){1to8}, %ymm22, %ymm25
|
||||
|
||||
// CHECK: vscalefps 4064(%rdx), %ymm22, %ymm25
|
||||
// CHECK: encoding: [0x62,0x62,0x4d,0x20,0x2c,0x4a,0x7f]
|
||||
vscalefps 4064(%rdx), %ymm22, %ymm25
|
||||
|
||||
// CHECK: vscalefps 4096(%rdx), %ymm22, %ymm25
|
||||
// CHECK: encoding: [0x62,0x62,0x4d,0x20,0x2c,0x8a,0x00,0x10,0x00,0x00]
|
||||
vscalefps 4096(%rdx), %ymm22, %ymm25
|
||||
|
||||
// CHECK: vscalefps -4096(%rdx), %ymm22, %ymm25
|
||||
// CHECK: encoding: [0x62,0x62,0x4d,0x20,0x2c,0x4a,0x80]
|
||||
vscalefps -4096(%rdx), %ymm22, %ymm25
|
||||
|
||||
// CHECK: vscalefps -4128(%rdx), %ymm22, %ymm25
|
||||
// CHECK: encoding: [0x62,0x62,0x4d,0x20,0x2c,0x8a,0xe0,0xef,0xff,0xff]
|
||||
vscalefps -4128(%rdx), %ymm22, %ymm25
|
||||
|
||||
// CHECK: vscalefps 508(%rdx){1to8}, %ymm22, %ymm25
|
||||
// CHECK: encoding: [0x62,0x62,0x4d,0x30,0x2c,0x4a,0x7f]
|
||||
vscalefps 508(%rdx){1to8}, %ymm22, %ymm25
|
||||
|
||||
// CHECK: vscalefps 512(%rdx){1to8}, %ymm22, %ymm25
|
||||
// CHECK: encoding: [0x62,0x62,0x4d,0x30,0x2c,0x8a,0x00,0x02,0x00,0x00]
|
||||
vscalefps 512(%rdx){1to8}, %ymm22, %ymm25
|
||||
|
||||
// CHECK: vscalefps -512(%rdx){1to8}, %ymm22, %ymm25
|
||||
// CHECK: encoding: [0x62,0x62,0x4d,0x30,0x2c,0x4a,0x80]
|
||||
vscalefps -512(%rdx){1to8}, %ymm22, %ymm25
|
||||
|
||||
// CHECK: vscalefps -516(%rdx){1to8}, %ymm22, %ymm25
|
||||
// CHECK: encoding: [0x62,0x62,0x4d,0x30,0x2c,0x8a,0xfc,0xfd,0xff,0xff]
|
||||
vscalefps -516(%rdx){1to8}, %ymm22, %ymm25
|
||||
|
||||
Loading…
Reference in New Issue
Block a user