Add a couple more instrs

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24744 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner 2005-12-16 07:18:48 +00:00
parent 3c1c514fae
commit 13e1501c91
4 changed files with 16 additions and 8 deletions

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@ -21,11 +21,13 @@ class F2 : InstV8 { // Format 2 instructions
// Specific F2 classes: SparcV8 manual, page 44
//
class F2_1<bits<3> op2Val, string name> : F2 {
class F2_1<bits<3> op2Val, dag ops, string asmstr> : F2 {
bits<5> rd;
dag OperandList = ops;
let AsmString = asmstr;
let op2 = op2Val;
let Name = name;
let Inst{29-25} = rd;
}

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@ -149,12 +149,14 @@ def STDFQri : F3_2<3, 0b100110,
"std $src, [$base+$offset]">;
// Section B.9 - SETHI Instruction, p. 104
def SETHIi: F2_1<0b100, "sethi">;
def SETHIi: F2_1<0b100,
(ops IntRegs:$dst, i32imm:$src),
"sethi $src, $dst">;
// Section B.10 - NOP Instruction, p. 105
// (It's a special case of SETHI)
let rd = 0, imm22 = 0 in
def NOP : F2_1<0b100, "nop">;
def NOP : F2_1<0b100, (ops), "nop">;
// Section B.11 - Logical Instructions, p. 106
def ANDrr : F3_1<2, 0b000001,

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@ -21,11 +21,13 @@ class F2 : InstV8 { // Format 2 instructions
// Specific F2 classes: SparcV8 manual, page 44
//
class F2_1<bits<3> op2Val, string name> : F2 {
class F2_1<bits<3> op2Val, dag ops, string asmstr> : F2 {
bits<5> rd;
dag OperandList = ops;
let AsmString = asmstr;
let op2 = op2Val;
let Name = name;
let Inst{29-25} = rd;
}

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@ -149,12 +149,14 @@ def STDFQri : F3_2<3, 0b100110,
"std $src, [$base+$offset]">;
// Section B.9 - SETHI Instruction, p. 104
def SETHIi: F2_1<0b100, "sethi">;
def SETHIi: F2_1<0b100,
(ops IntRegs:$dst, i32imm:$src),
"sethi $src, $dst">;
// Section B.10 - NOP Instruction, p. 105
// (It's a special case of SETHI)
let rd = 0, imm22 = 0 in
def NOP : F2_1<0b100, "nop">;
def NOP : F2_1<0b100, (ops), "nop">;
// Section B.11 - Logical Instructions, p. 106
def ANDrr : F3_1<2, 0b000001,