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rename ExpandBIT_CONVERT to EmitStackConvert, generalizing
it to allow it to emit different load and store kinds. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46065 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -199,7 +199,8 @@ private:
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SDOperand ExpandIntToFP(bool isSigned, MVT::ValueType DestTy,
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SDOperand Source);
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SDOperand ExpandBIT_CONVERT(MVT::ValueType DestVT, SDOperand SrcOp);
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SDOperand EmitStackConvert(SDOperand SrcOp, MVT::ValueType SlotVT,
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MVT::ValueType DestVT);
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SDOperand ExpandBUILD_VECTOR(SDNode *Node);
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SDOperand ExpandSCALAR_TO_VECTOR(SDNode *Node);
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SDOperand ExpandLegalINT_TO_FP(bool isSigned,
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@ -3326,7 +3327,8 @@ SDOperand SelectionDAGLegalize::LegalizeOp(SDOperand Op) {
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}
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case ISD::BIT_CONVERT:
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if (!isTypeLegal(Node->getOperand(0).getValueType())) {
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Result = ExpandBIT_CONVERT(Node->getValueType(0), Node->getOperand(0));
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Result = EmitStackConvert(Node->getOperand(0), Node->getValueType(0),
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Node->getValueType(0));
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} else if (MVT::isVector(Op.getOperand(0).getValueType())) {
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// The input has to be a vector type, we have to either scalarize it, pack
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// it, or convert it based on whether the input vector type is legal.
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@ -3357,7 +3359,8 @@ SDOperand SelectionDAGLegalize::LegalizeOp(SDOperand Op) {
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Node->getOperand(0).getValueType())) {
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default: assert(0 && "Unknown operation action!");
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case TargetLowering::Expand:
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Result = ExpandBIT_CONVERT(Node->getValueType(0), Node->getOperand(0));
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Result = EmitStackConvert(Node->getOperand(0), Node->getValueType(0),
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Node->getValueType(0));
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break;
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case TargetLowering::Legal:
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Tmp1 = LegalizeOp(Node->getOperand(0));
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@ -3583,7 +3586,7 @@ SDOperand SelectionDAGLegalize::LegalizeOp(SDOperand Op) {
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Result = DAG.getStore(DAG.getEntryNode(), Node->getOperand(0),
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StackSlot, NULL, 0);
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Result = DAG.getExtLoad(ISD::EXTLOAD, newVT,
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Result, StackSlot, NULL, 0, oldVT);
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Result, StackSlot, NULL, 0, oldVT);
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break;
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}
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}
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@ -3872,7 +3875,8 @@ SDOperand SelectionDAGLegalize::PromoteOp(SDOperand Op) {
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}
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break;
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case ISD::BIT_CONVERT:
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Result = ExpandBIT_CONVERT(Node->getValueType(0), Node->getOperand(0));
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Result = EmitStackConvert(Node->getOperand(0), Node->getValueType(0),
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Node->getValueType(0));
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Result = PromoteOp(Result);
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break;
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@ -4559,18 +4563,36 @@ void SelectionDAGLegalize::LegalizeSetCCOperands(SDOperand &LHS,
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RHS = Tmp2;
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}
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/// ExpandBIT_CONVERT - Expand a BIT_CONVERT node into a store/load combination.
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/// The resultant code need not be legal. Note that SrcOp is the input operand
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/// to the BIT_CONVERT, not the BIT_CONVERT node itself.
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SDOperand SelectionDAGLegalize::ExpandBIT_CONVERT(MVT::ValueType DestVT,
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SDOperand SrcOp) {
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/// EmitStackConvert - Emit a store/load combination to the stack. This stores
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/// SrcOp to a stack slot of type SlotVT, truncating it if needed. It then does
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/// a load from the stack slot to DestVT, extending it if needed.
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/// The resultant code need not be legal.
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SDOperand SelectionDAGLegalize::EmitStackConvert(SDOperand SrcOp,
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MVT::ValueType SlotVT,
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MVT::ValueType DestVT) {
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// Create the stack frame object.
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SDOperand FIPtr = DAG.CreateStackTemporary(DestVT);
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SDOperand FIPtr = DAG.CreateStackTemporary(SlotVT);
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unsigned SrcSize = MVT::getSizeInBits(SrcOp.getValueType());
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unsigned SlotSize = MVT::getSizeInBits(SlotVT);
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unsigned DestSize = MVT::getSizeInBits(DestVT);
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// Emit a store to the stack slot. Use a truncstore if the input value is
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// later than DestVT.
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SDOperand Store;
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if (SrcSize > SlotSize)
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Store = DAG.getTruncStore(DAG.getEntryNode(), SrcOp, FIPtr, NULL, 0,SlotVT);
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else {
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assert(SrcSize == SlotSize && "Invalid store");
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Store = DAG.getStore(DAG.getEntryNode(), SrcOp, FIPtr, NULL, 0);
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}
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// Emit a store to the stack slot.
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SDOperand Store = DAG.getStore(DAG.getEntryNode(), SrcOp, FIPtr, NULL, 0);
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// Result is a load from the stack slot.
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return DAG.getLoad(DestVT, Store, FIPtr, NULL, 0);
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if (SlotSize == DestSize)
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return DAG.getLoad(DestVT, Store, FIPtr, NULL, 0);
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assert(SlotSize < DestSize && "Unknown extension!");
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return DAG.getExtLoad(ISD::EXTLOAD, DestVT, Store, FIPtr, NULL, 0, SlotVT);
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}
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SDOperand SelectionDAGLegalize::ExpandSCALAR_TO_VECTOR(SDNode *Node) {
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@ -5726,7 +5748,7 @@ void SelectionDAGLegalize::ExpandOp(SDOperand Op, SDOperand &Lo, SDOperand &Hi){
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// Turn this into a load/store pair by default.
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if (Tmp.Val == 0)
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Tmp = ExpandBIT_CONVERT(VT, Node->getOperand(0));
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Tmp = EmitStackConvert(Node->getOperand(0), VT, VT);
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ExpandOp(Tmp, Lo, Hi);
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break;
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