mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2025-06-23 01:24:30 +00:00
Change the interface to the predicate that determines if vsplti* can be used.
No functionality changes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27536 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
@ -425,10 +425,11 @@ unsigned PPC::getVSPLTImmediate(SDNode *N, unsigned EltSize) {
|
|||||||
return cast<ConstantSDNode>(N->getOperand(0))->getValue() / EltSize;
|
return cast<ConstantSDNode>(N->getOperand(0))->getValue() / EltSize;
|
||||||
}
|
}
|
||||||
|
|
||||||
/// isVecSplatImm - Return true if this is a build_vector of constants which
|
/// get_VSPLI_elt - If this is a build_vector of constants which can be formed
|
||||||
/// can be formed by using a vspltis[bhw] instruction. The ByteSize field
|
/// by using a vspltis[bhw] instruction of the specified element size, return
|
||||||
/// indicates the number of bytes of each element [124] -> [bhw].
|
/// the constant being splatted. The ByteSize field indicates the number of
|
||||||
bool PPC::isVecSplatImm(SDNode *N, unsigned ByteSize, char *Val) {
|
/// bytes of each element [124] -> [bhw].
|
||||||
|
SDOperand PPC::get_VSPLI_elt(SDNode *N, unsigned ByteSize, SelectionDAG &DAG) {
|
||||||
SDOperand OpVal(0, 0);
|
SDOperand OpVal(0, 0);
|
||||||
// Check to see if this buildvec has a single non-undef value in its elements.
|
// Check to see if this buildvec has a single non-undef value in its elements.
|
||||||
for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) {
|
for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) {
|
||||||
@ -436,10 +437,10 @@ bool PPC::isVecSplatImm(SDNode *N, unsigned ByteSize, char *Val) {
|
|||||||
if (OpVal.Val == 0)
|
if (OpVal.Val == 0)
|
||||||
OpVal = N->getOperand(i);
|
OpVal = N->getOperand(i);
|
||||||
else if (OpVal != N->getOperand(i))
|
else if (OpVal != N->getOperand(i))
|
||||||
return false;
|
return SDOperand();
|
||||||
}
|
}
|
||||||
|
|
||||||
if (OpVal.Val == 0) return false; // All UNDEF: use implicit def.
|
if (OpVal.Val == 0) return SDOperand(); // All UNDEF: use implicit def.
|
||||||
|
|
||||||
unsigned ValSizeInBytes = 0;
|
unsigned ValSizeInBytes = 0;
|
||||||
uint64_t Value = 0;
|
uint64_t Value = 0;
|
||||||
@ -455,7 +456,7 @@ bool PPC::isVecSplatImm(SDNode *N, unsigned ByteSize, char *Val) {
|
|||||||
// If the splat value is larger than the element value, then we can never do
|
// If the splat value is larger than the element value, then we can never do
|
||||||
// this splat. The only case that we could fit the replicated bits into our
|
// this splat. The only case that we could fit the replicated bits into our
|
||||||
// immediate field for would be zero, and we prefer to use vxor for it.
|
// immediate field for would be zero, and we prefer to use vxor for it.
|
||||||
if (ValSizeInBytes < ByteSize) return false;
|
if (ValSizeInBytes < ByteSize) return SDOperand();
|
||||||
|
|
||||||
// If the element value is larger than the splat value, cut it in half and
|
// If the element value is larger than the splat value, cut it in half and
|
||||||
// check to see if the two halves are equal. Continue doing this until we
|
// check to see if the two halves are equal. Continue doing this until we
|
||||||
@ -466,7 +467,7 @@ bool PPC::isVecSplatImm(SDNode *N, unsigned ByteSize, char *Val) {
|
|||||||
// If the top half equals the bottom half, we're still ok.
|
// If the top half equals the bottom half, we're still ok.
|
||||||
if (((Value >> (ValSizeInBytes*8)) & ((1 << (8*ValSizeInBytes))-1)) !=
|
if (((Value >> (ValSizeInBytes*8)) & ((1 << (8*ValSizeInBytes))-1)) !=
|
||||||
(Value & ((1 << (8*ValSizeInBytes))-1)))
|
(Value & ((1 << (8*ValSizeInBytes))-1)))
|
||||||
return false;
|
return SDOperand();
|
||||||
}
|
}
|
||||||
|
|
||||||
// Properly sign extend the value.
|
// Properly sign extend the value.
|
||||||
@ -474,12 +475,12 @@ bool PPC::isVecSplatImm(SDNode *N, unsigned ByteSize, char *Val) {
|
|||||||
int MaskVal = ((int)Value << ShAmt) >> ShAmt;
|
int MaskVal = ((int)Value << ShAmt) >> ShAmt;
|
||||||
|
|
||||||
// If this is zero, don't match, zero matches ISD::isBuildVectorAllZeros.
|
// If this is zero, don't match, zero matches ISD::isBuildVectorAllZeros.
|
||||||
if (MaskVal == 0) return false;
|
if (MaskVal == 0) return SDOperand();
|
||||||
|
|
||||||
if (Val) *Val = MaskVal;
|
// Finally, if this value fits in a 5 bit sext field, return it
|
||||||
|
if (((MaskVal << (32-5)) >> (32-5)) == MaskVal)
|
||||||
// Finally, if this value fits in a 5 bit sext field, return true.
|
return DAG.getTargetConstant(MaskVal, MVT::i32);
|
||||||
return ((MaskVal << (32-5)) >> (32-5)) == MaskVal;
|
return SDOperand();
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
@ -849,9 +850,9 @@ SDOperand PPCTargetLowering::LowerOperation(SDOperand Op, SelectionDAG &DAG) {
|
|||||||
if (ISD::isBuildVectorAllZeros(Op.Val))
|
if (ISD::isBuildVectorAllZeros(Op.Val))
|
||||||
return Op;
|
return Op;
|
||||||
|
|
||||||
if (PPC::isVecSplatImm(Op.Val, 1) || // vspltisb
|
if (PPC::get_VSPLI_elt(Op.Val, 1, DAG).Val || // vspltisb
|
||||||
PPC::isVecSplatImm(Op.Val, 2) || // vspltish
|
PPC::get_VSPLI_elt(Op.Val, 2, DAG).Val || // vspltish
|
||||||
PPC::isVecSplatImm(Op.Val, 4)) // vspltisw
|
PPC::get_VSPLI_elt(Op.Val, 4, DAG).Val) // vspltisw
|
||||||
return Op;
|
return Op;
|
||||||
|
|
||||||
return SDOperand();
|
return SDOperand();
|
||||||
|
@ -131,10 +131,11 @@ namespace llvm {
|
|||||||
/// specified isSplatShuffleMask VECTOR_SHUFFLE mask.
|
/// specified isSplatShuffleMask VECTOR_SHUFFLE mask.
|
||||||
unsigned getVSPLTImmediate(SDNode *N, unsigned EltSize);
|
unsigned getVSPLTImmediate(SDNode *N, unsigned EltSize);
|
||||||
|
|
||||||
/// isVecSplatImm - Return true if this is a build_vector of constants which
|
/// get_VSPLI_elt - If this is a build_vector of constants which can be
|
||||||
/// can be formed by using a vspltis[bhw] instruction. The ByteSize field
|
/// formed by using a vspltis[bhw] instruction of the specified element
|
||||||
/// indicates the number of bytes of each element [124] -> [bhw].
|
/// size, return the constant being splatted. The ByteSize field indicates
|
||||||
bool isVecSplatImm(SDNode *N, unsigned ByteSize, char *Val = 0);
|
/// the number of bytes of each element [124] -> [bhw].
|
||||||
|
SDOperand get_VSPLI_elt(SDNode *N, unsigned ByteSize, SelectionDAG &DAG);
|
||||||
}
|
}
|
||||||
|
|
||||||
class PPCTargetLowering : public TargetLowering {
|
class PPCTargetLowering : public TargetLowering {
|
||||||
|
@ -111,32 +111,26 @@ def VSPLTW_shuffle_mask : PatLeaf<(build_vector), [{
|
|||||||
|
|
||||||
// VSPLTISB_get_imm xform function: convert build_vector to VSPLTISB imm.
|
// VSPLTISB_get_imm xform function: convert build_vector to VSPLTISB imm.
|
||||||
def VSPLTISB_get_imm : SDNodeXForm<build_vector, [{
|
def VSPLTISB_get_imm : SDNodeXForm<build_vector, [{
|
||||||
char Val;
|
return PPC::get_VSPLI_elt(N, 1, *CurDAG);
|
||||||
PPC::isVecSplatImm(N, 1, &Val);
|
|
||||||
return getI32Imm(Val);
|
|
||||||
}]>;
|
}]>;
|
||||||
def vecspltisb : PatLeaf<(build_vector), [{
|
def vecspltisb : PatLeaf<(build_vector), [{
|
||||||
return PPC::isVecSplatImm(N, 1);
|
return PPC::get_VSPLI_elt(N, 1, *CurDAG).Val != 0;
|
||||||
}], VSPLTISB_get_imm>;
|
}], VSPLTISB_get_imm>;
|
||||||
|
|
||||||
// VSPLTISH_get_imm xform function: convert build_vector to VSPLTISH imm.
|
// VSPLTISH_get_imm xform function: convert build_vector to VSPLTISH imm.
|
||||||
def VSPLTISH_get_imm : SDNodeXForm<build_vector, [{
|
def VSPLTISH_get_imm : SDNodeXForm<build_vector, [{
|
||||||
char Val;
|
return PPC::get_VSPLI_elt(N, 2, *CurDAG);
|
||||||
PPC::isVecSplatImm(N, 2, &Val);
|
|
||||||
return getI32Imm(Val);
|
|
||||||
}]>;
|
}]>;
|
||||||
def vecspltish : PatLeaf<(build_vector), [{
|
def vecspltish : PatLeaf<(build_vector), [{
|
||||||
return PPC::isVecSplatImm(N, 2);
|
return PPC::get_VSPLI_elt(N, 2, *CurDAG).Val != 0;
|
||||||
}], VSPLTISH_get_imm>;
|
}], VSPLTISH_get_imm>;
|
||||||
|
|
||||||
// VSPLTISW_get_imm xform function: convert build_vector to VSPLTISW imm.
|
// VSPLTISW_get_imm xform function: convert build_vector to VSPLTISW imm.
|
||||||
def VSPLTISW_get_imm : SDNodeXForm<build_vector, [{
|
def VSPLTISW_get_imm : SDNodeXForm<build_vector, [{
|
||||||
char Val;
|
return PPC::get_VSPLI_elt(N, 4, *CurDAG);
|
||||||
PPC::isVecSplatImm(N, 4, &Val);
|
|
||||||
return getI32Imm(Val);
|
|
||||||
}]>;
|
}]>;
|
||||||
def vecspltisw : PatLeaf<(build_vector), [{
|
def vecspltisw : PatLeaf<(build_vector), [{
|
||||||
return PPC::isVecSplatImm(N, 4);
|
return PPC::get_VSPLI_elt(N, 4, *CurDAG).Val != 0;
|
||||||
}], VSPLTISW_get_imm>;
|
}], VSPLTISW_get_imm>;
|
||||||
|
|
||||||
//===----------------------------------------------------------------------===//
|
//===----------------------------------------------------------------------===//
|
||||||
|
Reference in New Issue
Block a user