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Add assertion checks here to turn silent miscompiles into aborts.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85639 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Dan Gohman 2009-10-30 23:59:06 +00:00
parent 4cddfd9b6f
commit 1410b7620a
1 changed files with 8 additions and 4 deletions
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12
lib/CodeGen/ScheduleDAGEmit.cpp
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@ -50,8 +50,10 @@ void ScheduleDAG::EmitPhysRegCopy(SUnit *SU,
break;
}
}
TII->copyRegToReg(*BB, InsertPos, Reg, VRI->second,
SU->CopyDstRC, SU->CopySrcRC);
bool Success = TII->copyRegToReg(*BB, InsertPos, Reg, VRI->second,
SU->CopyDstRC, SU->CopySrcRC);
(void)Success;
assert(Success && "copyRegToReg failed!");
} else {
// Copy from physical register.
assert(I->getReg() && "Unknown physical register!");
@ -59,8 +61,10 @@ void ScheduleDAG::EmitPhysRegCopy(SUnit *SU,
bool isNew = VRBaseMap.insert(std::make_pair(SU, VRBase)).second;
isNew = isNew; // Silence compiler warning.
assert(isNew && "Node emitted out of order - early");
TII->copyRegToReg(*BB, InsertPos, VRBase, I->getReg(),
SU->CopyDstRC, SU->CopySrcRC);
bool Success = TII->copyRegToReg(*BB, InsertPos, VRBase, I->getReg(),
SU->CopyDstRC, SU->CopySrcRC);
(void)Success;
assert(Success && "copyRegToReg failed!");
}
break;
}