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add one addressing mode description hook to rule them all.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35520 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -853,9 +853,29 @@ public:
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MachineBasicBlock *MBB);
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//===--------------------------------------------------------------------===//
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// Loop Strength Reduction hooks
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// Addressing mode description hooks (used by LSR etc).
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//
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/// AddrMode - This represents an addressing mode of:
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/// BaseGV + BaseOffs + BaseReg + Scale*ScaleReg
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/// If BaseGV is null, there is no BaseGV.
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/// If BaseOffs is zero, there is no base offset.
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/// If HasBaseReg is false, there is no base register.
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/// If Scale is zero, there is no ScaleReg. Scale of 1 indicates a reg with
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/// no scale.
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///
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struct AddrMode {
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GlobalValue *BaseGV;
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int64_t BaseOffs;
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bool HasBaseReg;
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int64_t Scale;
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};
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/// isLegalAddressingMode - Return true if the addressing mode represented by
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/// AM is legal for this target, for a load/store of the specified type.
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/// TODO: Handle pre/postinc as well.
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virtual bool isLegalAddressingMode(const AddrMode &AM, const Type *Ty) const;
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/// isLegalAddressImmediate - Return true if the integer value can be used as
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/// the offset of the target addressing mode for load / store of the given
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/// type.
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@ -1940,6 +1940,40 @@ getRegForInlineAsmConstraint(const std::string &Constraint,
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// Loop Strength Reduction hooks
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//===----------------------------------------------------------------------===//
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/// isLegalAddressingMode - Return true if the addressing mode represented
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/// by AM is legal for this target, for a load/store of the specified type.
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bool TargetLowering::isLegalAddressingMode(const AddrMode &AM,
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const Type *Ty) const {
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// The default implementation of this implements a conservative RISCy, r+r and
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// r+i addr mode.
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// Allows a sign-extended 16-bit immediate field.
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if (AM.BaseOffs <= -(1LL << 16) || AM.BaseOffs >= (1LL << 16)-1)
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return false;
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// No global is ever allowed as a base.
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if (AM.BaseGV)
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return false;
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// Only support r+r,
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switch (AM.Scale) {
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case 0: // "r+i" or just "i", depending on HasBaseReg.
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break;
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case 1:
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if (AM.HasBaseReg && AM.BaseOffs) // "r+r+i" is not allowed.
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return false;
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// Otherwise we have r+r or r+i.
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break;
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case 2:
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if (AM.HasBaseReg || AM.BaseOffs) // 2*r+r or 2*r+i is not allowed.
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return false;
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// Allow 2*r as r+r.
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break;
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}
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return true;
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}
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/// isLegalAddressImmediate - Return true if the integer value can be used as
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/// the offset of the target addressing mode for load / store of the given
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/// type.
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