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ARM Cost model: Use the size of vector registers and widest vectorizable instruction to determine the max vectorization factor.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@172010 91177308-0d34-0410-b5e6-96231b3b80d8
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@@ -84,6 +84,7 @@ public:
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virtual unsigned getNumberOfRegisters(bool Vector) const;
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virtual unsigned getMaximumUnrollFactor() const;
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virtual unsigned getRegisterBitWidth(bool Vector) const;
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virtual unsigned getArithmeticInstrCost(unsigned Opcode, Type *Ty) const;
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virtual unsigned getShuffleCost(ShuffleKind Kind, Type *Tp,
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int Index, Type *SubTp) const;
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@@ -183,6 +184,10 @@ unsigned BasicTTI::getNumberOfRegisters(bool Vector) const {
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return 1;
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}
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unsigned BasicTTI::getRegisterBitWidth(bool Vector) const {
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return 32;
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}
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unsigned BasicTTI::getMaximumUnrollFactor() const {
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return 1;
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}
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