ARM Cost model: Use the size of vector registers and widest vectorizable instruction to determine the max vectorization factor.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@172010 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Nadav Rotem
2013-01-09 22:29:00 +00:00
parent d2f8216ba4
commit 14925e6b88
9 changed files with 153 additions and 5 deletions
+5
View File
@@ -84,6 +84,7 @@ public:
virtual unsigned getNumberOfRegisters(bool Vector) const;
virtual unsigned getMaximumUnrollFactor() const;
virtual unsigned getRegisterBitWidth(bool Vector) const;
virtual unsigned getArithmeticInstrCost(unsigned Opcode, Type *Ty) const;
virtual unsigned getShuffleCost(ShuffleKind Kind, Type *Tp,
int Index, Type *SubTp) const;
@@ -183,6 +184,10 @@ unsigned BasicTTI::getNumberOfRegisters(bool Vector) const {
return 1;
}
unsigned BasicTTI::getRegisterBitWidth(bool Vector) const {
return 32;
}
unsigned BasicTTI::getMaximumUnrollFactor() const {
return 1;
}