From 14ccc7b963861a856b593cc4fff62decd8ce248a Mon Sep 17 00:00:00 2001 From: Andrew Trick Date: Mon, 2 Jul 2012 19:12:29 +0000 Subject: [PATCH] Revert accidental checkin. My last checkin was apparently not the branch I intended. It was missing one change (added by chandlerc), and contained a spurious change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159548 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/ARM/ARMBaseInstrInfo.cpp | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/lib/Target/ARM/ARMBaseInstrInfo.cpp b/lib/Target/ARM/ARMBaseInstrInfo.cpp index 7227e62c7c3..57c20ae6a44 100644 --- a/lib/Target/ARM/ARMBaseInstrInfo.cpp +++ b/lib/Target/ARM/ARMBaseInstrInfo.cpp @@ -3057,10 +3057,9 @@ unsigned ARMBaseInstrInfo::getInstrLatency(const InstrItineraryData *ItinData, unsigned Class = MCID.getSchedClass(); // For instructions with variable uops, use uops as latency. - if (!ItinData->isEmpty() && ItinData->getNumMicroOps(Class) < 0) { - dbgs() << "UOPS " << getNumMicroOps(ItinData, MI) << " " << *MI << '\n'; + if (!ItinData->isEmpty() && ItinData->getNumMicroOps(Class) < 0) return getNumMicroOps(ItinData, MI); - } + // For the common case, fall back on the itinerary's latency. unsigned Latency = ItinData->getStageLatency(Class);