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[mips] Define a helper function which creates an instruction with the same
operands as the prototype instruction but with a different opcode. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181714 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -282,3 +282,16 @@ unsigned MipsInstrInfo::GetInstSizeInBytes(const MachineInstr *MI) const {
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}
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}
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}
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}
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}
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}
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MachineInstrBuilder
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MipsInstrInfo::genInstrWithNewOpc(unsigned NewOpc,
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MachineBasicBlock::iterator I) const {
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MachineInstrBuilder MIB;
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MIB = BuildMI(*I->getParent(), I, I->getDebugLoc(), get(NewOpc));
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for (unsigned J = 0, E = I->getDesc().getNumOperands(); J < E; ++J)
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MIB.addOperand(I->getOperand(J));
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MIB.setMemRefs(I->memoperands_begin(), I->memoperands_end());
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return MIB;
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}
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@ -17,6 +17,7 @@
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#include "Mips.h"
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#include "Mips.h"
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#include "MipsAnalyzeImmediate.h"
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#include "MipsAnalyzeImmediate.h"
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#include "MipsRegisterInfo.h"
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#include "MipsRegisterInfo.h"
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#include "llvm/CodeGen/MachineInstrBuilder.h"
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#include "llvm/Support/ErrorHandling.h"
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#include "llvm/Support/ErrorHandling.h"
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#include "llvm/Target/TargetInstrInfo.h"
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#include "llvm/Target/TargetInstrInfo.h"
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@ -116,6 +117,11 @@ public:
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const TargetRegisterInfo *TRI,
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const TargetRegisterInfo *TRI,
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int64_t Offset) const = 0;
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int64_t Offset) const = 0;
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/// Create an instruction which has the same operands and memory operands
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/// as MI but has a new opcode.
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MachineInstrBuilder genInstrWithNewOpc(unsigned NewOpc,
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MachineBasicBlock::iterator I) const;
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protected:
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protected:
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bool isZeroImm(const MachineOperand &op) const;
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bool isZeroImm(const MachineOperand &op) const;
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