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SIGN_EXTEND_INREG requires one extra operand, a ValueType node.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35350 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Evan Cheng 2007-03-26 07:12:51 +00:00
parent c3a53f2720
commit 15213b77cf
1 changed files with 6 additions and 2 deletions
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8
lib/CodeGen/SelectionDAG/DAGCombiner.cpp
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@ -2327,8 +2327,12 @@ SDOperand DAGCombiner::ReduceLoadWidth(SDNode *N) {
CombineTo(N->getOperand(0).Val, Load);
} else
CombineTo(N0.Val, Load, Load.getValue(1));
if (ShAmt)
return DAG.getNode(N->getOpcode(), VT, Load);
if (ShAmt) {
if (Opc == ISD::SIGN_EXTEND_INREG)
return DAG.getNode(Opc, VT, Load, N->getOperand(1));
else
return DAG.getNode(Opc, VT, Load);
}
return SDOperand(N, 0); // Return N so it doesn't get rechecked!
}