mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-08-19 04:29:21 +00:00
SIGN_EXTEND_INREG requires one extra operand, a ValueType node.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35350 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
parent
c3a53f2720
commit
15213b77cf
@ -2327,8 +2327,12 @@ SDOperand DAGCombiner::ReduceLoadWidth(SDNode *N) {
|
|||||||
CombineTo(N->getOperand(0).Val, Load);
|
CombineTo(N->getOperand(0).Val, Load);
|
||||||
} else
|
} else
|
||||||
CombineTo(N0.Val, Load, Load.getValue(1));
|
CombineTo(N0.Val, Load, Load.getValue(1));
|
||||||
if (ShAmt)
|
if (ShAmt) {
|
||||||
return DAG.getNode(N->getOpcode(), VT, Load);
|
if (Opc == ISD::SIGN_EXTEND_INREG)
|
||||||
|
return DAG.getNode(Opc, VT, Load, N->getOperand(1));
|
||||||
|
else
|
||||||
|
return DAG.getNode(Opc, VT, Load);
|
||||||
|
}
|
||||||
return SDOperand(N, 0); // Return N so it doesn't get rechecked!
|
return SDOperand(N, 0); // Return N so it doesn't get rechecked!
|
||||||
}
|
}
|
||||||
|
|
||||||
|
Loading…
Reference in New Issue
Block a user