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Add support for CondCode's
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24008 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -291,8 +291,13 @@ bool TreePatternNode::UpdateNodeType(unsigned char VT, TreePattern &TP) {
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return true;
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return true;
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}
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}
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if (isLeaf()) {
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dump();
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TP.error("Type inference contradiction found in node!");
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} else {
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TP.error("Type inference contradiction found in node " +
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TP.error("Type inference contradiction found in node " +
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getOperator()->getName() + "!");
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getOperator()->getName() + "!");
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}
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return true; // unreachable
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return true; // unreachable
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}
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}
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@ -466,8 +471,8 @@ static unsigned char getIntrinsicType(Record *R, bool NotRegisters,
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// TODO: if a register appears in exactly one regclass, we could use that
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// TODO: if a register appears in exactly one regclass, we could use that
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// type info.
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// type info.
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return MVT::isUnknown;
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return MVT::isUnknown;
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} else if (R->isSubClassOf("ValueType")) {
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} else if (R->isSubClassOf("ValueType") || R->isSubClassOf("CondCode")) {
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// Using a VTSDNode.
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// Using a VTSDNode or CondCodeSDNode.
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return MVT::Other;
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return MVT::Other;
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} else if (R->getName() == "node") {
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} else if (R->getName() == "node") {
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// Placeholder.
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// Placeholder.
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@ -1582,6 +1587,11 @@ void DAGISelEmitter::EmitMatchForPattern(TreePatternNode *N,
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OS << " if (cast<VTSDNode>(" << RootName << i << ")->getVT() != "
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OS << " if (cast<VTSDNode>(" << RootName << i << ")->getVT() != "
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<< "MVT::" << LeafRec->getName() << ") goto P" << PatternNo
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<< "MVT::" << LeafRec->getName() << ") goto P" << PatternNo
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<< "Fail;\n";
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<< "Fail;\n";
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} else if (LeafRec->isSubClassOf("CondCode")) {
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// Make sure this is the specified cond code.
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OS << " if (cast<CondCodeSDNode>(" << RootName << i
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<< ")->get() != " << "MVT::" << LeafRec->getName()
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<< ") goto P" << PatternNo << "Fail;\n";
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} else {
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} else {
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Child->dump();
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Child->dump();
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assert(0 && "Unknown leaf type!");
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assert(0 && "Unknown leaf type!");
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