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Remove getRegClassForInlineAsmConstraint from sparc.
Part of rdar://9643582 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134083 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -1,4 +1,3 @@
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//===-- SparcISelLowering.cpp - Sparc DAG Lowering Implementation ---------===//
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//
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// The LLVM Compiler Infrastructure
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@ -1265,26 +1264,6 @@ SparcTargetLowering::getRegForInlineAsmConstraint(const std::string &Constraint,
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return TargetLowering::getRegForInlineAsmConstraint(Constraint, VT);
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}
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std::vector<unsigned> SparcTargetLowering::
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getRegClassForInlineAsmConstraint(const std::string &Constraint,
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EVT VT) const {
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if (Constraint.size() != 1)
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return std::vector<unsigned>();
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switch (Constraint[0]) {
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default: break;
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case 'r':
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return make_vector<unsigned>(SP::L0, SP::L1, SP::L2, SP::L3,
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SP::L4, SP::L5, SP::L6, SP::L7,
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SP::I0, SP::I1, SP::I2, SP::I3,
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SP::I4, SP::I5,
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SP::O0, SP::O1, SP::O2, SP::O3,
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SP::O4, SP::O5, SP::O7, 0);
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}
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return std::vector<unsigned>();
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}
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bool
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SparcTargetLowering::isOffsetFoldingLegal(const GlobalAddressSDNode *GA) const {
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// The Sparc target isn't yet aware of offsets.
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