Remove getRegClassForInlineAsmConstraint from sparc.

Part of rdar://9643582


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134083 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Eric Christopher
2011-06-29 18:53:10 +00:00
parent ca42299619
commit 158bf50787
2 changed files with 0 additions and 24 deletions

View File

@ -1,4 +1,3 @@
//===-- SparcISelLowering.cpp - Sparc DAG Lowering Implementation ---------===//
//
// The LLVM Compiler Infrastructure
@ -1265,26 +1264,6 @@ SparcTargetLowering::getRegForInlineAsmConstraint(const std::string &Constraint,
return TargetLowering::getRegForInlineAsmConstraint(Constraint, VT);
}
std::vector<unsigned> SparcTargetLowering::
getRegClassForInlineAsmConstraint(const std::string &Constraint,
EVT VT) const {
if (Constraint.size() != 1)
return std::vector<unsigned>();
switch (Constraint[0]) {
default: break;
case 'r':
return make_vector<unsigned>(SP::L0, SP::L1, SP::L2, SP::L3,
SP::L4, SP::L5, SP::L6, SP::L7,
SP::I0, SP::I1, SP::I2, SP::I3,
SP::I4, SP::I5,
SP::O0, SP::O1, SP::O2, SP::O3,
SP::O4, SP::O5, SP::O7, 0);
}
return std::vector<unsigned>();
}
bool
SparcTargetLowering::isOffsetFoldingLegal(const GlobalAddressSDNode *GA) const {
// The Sparc target isn't yet aware of offsets.