mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-08-21 18:29:46 +00:00
Fix a bug in the ARM disassembly of the neon VLD2 all lanes instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152127 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
parent
e46137f498
commit
158c8a49c2
@ -2556,17 +2556,14 @@ static DecodeStatus DecodeVLD2DupInstruction(llvm::MCInst &Inst, unsigned Insn,
|
||||
unsigned Rm = fieldFromInstruction32(Insn, 0, 4);
|
||||
unsigned align = fieldFromInstruction32(Insn, 4, 1);
|
||||
unsigned size = 1 << fieldFromInstruction32(Insn, 6, 2);
|
||||
unsigned inc = fieldFromInstruction32(Insn, 5, 1) + 1;
|
||||
unsigned pred = fieldFromInstruction32(Insn, 22, 4);
|
||||
align *= 2*size;
|
||||
|
||||
if (!Check(S, DecodeDPRRegisterClass(Inst, Rd, Address, Decoder)))
|
||||
return MCDisassembler::Fail;
|
||||
if (!Check(S, DecodeDPRRegisterClass(Inst, (Rd+inc)%32, Address, Decoder)))
|
||||
return MCDisassembler::Fail;
|
||||
if (Rm != 0xF) {
|
||||
if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder)))
|
||||
return MCDisassembler::Fail;
|
||||
}
|
||||
|
||||
if (Rm != 0xF)
|
||||
Inst.addOperand(MCOperand::CreateImm(0));
|
||||
|
||||
if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder)))
|
||||
return MCDisassembler::Fail;
|
||||
@ -2579,6 +2576,9 @@ static DecodeStatus DecodeVLD2DupInstruction(llvm::MCInst &Inst, unsigned Insn,
|
||||
return MCDisassembler::Fail;
|
||||
}
|
||||
|
||||
if (!Check(S, DecodePredicateOperand(Inst, pred, Address, Decoder)))
|
||||
return MCDisassembler::Fail;
|
||||
|
||||
return S;
|
||||
}
|
||||
|
||||
|
@ -1869,3 +1869,10 @@
|
||||
# CHECK: vmov.f32 d0, #1.600000e+01
|
||||
# CHECK: vmov.f32 q0, #1.600000e+01
|
||||
|
||||
# rdar://10798451
|
||||
0xe7 0xf9 0x32 0x1d
|
||||
# CHECK vld2.8 {d17[], d19[]}, [r7, :16], r2
|
||||
0xe7 0xf9 0x3d 0x1d
|
||||
# CHECK vld2.8 {d17[], d19[]}, [r7, :16]!
|
||||
0xe7 0xf9 0x3f 0x1d
|
||||
# CHECK vld2.8 {d17[], d19[]}, [r7, :16]
|
||||
|
@ -1588,3 +1588,10 @@
|
||||
0x63 0xf9 0x37 0xc9
|
||||
# CHECK: vld2.8 {d28, d30}, [r3, :256], r7
|
||||
|
||||
# rdar://10798451
|
||||
0xe7 0xf9 0x32 0x1d
|
||||
# CHECK vld2.8 {d17[], d19[]}, [r7, :16], r2
|
||||
0xe7 0xf9 0x3d 0x1d
|
||||
# CHECK vld2.8 {d17[], d19[]}, [r7, :16]!
|
||||
0xe7 0xf9 0x3f 0x1d
|
||||
# CHECK vld2.8 {d17[], d19[]}, [r7, :16]
|
||||
|
Loading…
Reference in New Issue
Block a user