6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2024-12-14 11:32:34 +00:00
Code Issues Projects Releases Wiki Activity

Move DataLayout from the PPCTargetMachine to the subtarget.

Browse Source 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210824 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Eric Christopher 2014-06-12 21:08:06 +00:00
parent 054a74452c
commit 159a755d7c
4 changed files with 46 additions and 40 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

38
lib/Target/PowerPC/PPCSubtarget.cpp
View File

@ -32,6 +32,41 @@ using namespace llvm;
#define GET_SUBTARGETINFO_CTOR
#include "PPCGenSubtargetInfo.inc"
/// Return the datalayout string of a subtarget.
static std::string getDataLayoutString(const PPCSubtarget &ST) {
const Triple &T = ST.getTargetTriple();
std::string Ret;
// Most PPC* platforms are big endian, PPC64LE is little endian.
if (ST.isLittleEndian())
Ret = "e";
else
Ret = "E";
Ret += DataLayout::getManglingComponent(T);
// PPC32 has 32 bit pointers. The PS3 (OS Lv2) is a PPC64 machine with 32 bit
// pointers.
if (!ST.isPPC64() || T.getOS() == Triple::Lv2)
Ret += "-p:32:32";
// Note, the alignment values for f64 and i64 on ppc64 in Darwin
// documentation are wrong; these are correct (i.e. "what gcc does").
if (ST.isPPC64() || ST.isSVR4ABI())
Ret += "-i64:64";
else
Ret += "-f64:32:64";
// PPC64 has 32 and 64 bit registers, PPC32 has only 32 bit ones.
if (ST.isPPC64())
Ret += "-n32:64";
else
Ret += "-n32";
return Ret;
}
PPCSubtarget &PPCSubtarget::initializeSubtargetDependencies(StringRef CPU,
StringRef FS) {
initializeEnvironment();
@ -44,7 +79,8 @@ PPCSubtarget::PPCSubtarget(const std::string &TT, const std::string &CPU,
CodeGenOpt::Level OptLevel)
: PPCGenSubtargetInfo(TT, CPU, FS), IsPPC64(is64Bit), TargetTriple(TT),
OptLevel(OptLevel),
FrameLowering(initializeSubtargetDependencies(CPU, FS)) {}
FrameLowering(initializeSubtargetDependencies(CPU, FS)),
DL(getDataLayoutString(*this)) {}
/// SetJITMode - This is called to inform the subtarget info that we are
/// producing code for the JIT.

4
lib/Target/PowerPC/PPCSubtarget.h
View File

@ -16,6 +16,7 @@
#include "PPCFrameLowering.h"
#include "llvm/ADT/Triple.h"
#include "llvm/IR/DataLayout.h"
#include "llvm/MC/MCInstrItineraries.h"
#include "llvm/Target/TargetSubtargetInfo.h"
#include <string>
@ -104,6 +105,8 @@ protected:
CodeGenOpt::Level OptLevel;
PPCFrameLowering FrameLowering;
const DataLayout DL;
public:
/// This constructor initializes the data members to match that
/// of the specified triple.
@ -134,6 +137,7 @@ public:
const InstrItineraryData &getInstrItineraryData() const { return InstrItins; }
const PPCFrameLowering *getFrameLowering() const { return &FrameLowering; }
const DataLayout *getDataLayout() const { return &DL; }
/// initializeSubtargetDependencies - Initializes using a CPU and feature string
/// so that we can use initializer lists for subtarget initialization.

39
lib/Target/PowerPC/PPCTargetMachine.cpp
View File

@ -37,48 +37,13 @@ extern "C" void LLVMInitializePowerPCTarget() {
RegisterTargetMachine<PPC64TargetMachine> C(ThePPC64LETarget);
}
/// Return the datalayout string of a subtarget.
static std::string getDataLayoutString(const PPCSubtarget &ST) {
const Triple &T = ST.getTargetTriple();
std::string Ret;
// Most PPC* platforms are big endian, PPC64LE is little endian.
if (ST.isLittleEndian())
Ret = "e";
else
Ret = "E";
Ret += DataLayout::getManglingComponent(T);
// PPC32 has 32 bit pointers. The PS3 (OS Lv2) is a PPC64 machine with 32 bit
// pointers.
if (!ST.isPPC64() || T.getOS() == Triple::Lv2)
Ret += "-p:32:32";
// Note, the alignment values for f64 and i64 on ppc64 in Darwin
// documentation are wrong; these are correct (i.e. "what gcc does").
if (ST.isPPC64() || ST.isSVR4ABI())
Ret += "-i64:64";
else
Ret += "-f64:32:64";
// PPC64 has 32 and 64 bit registers, PPC32 has only 32 bit ones.
if (ST.isPPC64())
Ret += "-n32:64";
else
Ret += "-n32";
return Ret;
}
PPCTargetMachine::PPCTargetMachine(const Target &T, StringRef TT, StringRef CPU,
StringRef FS, const TargetOptions &Options,
Reloc::Model RM, CodeModel::Model CM,
CodeGenOpt::Level OL, bool is64Bit)
: LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL),
Subtarget(TT, CPU, FS, is64Bit, OL), DL(getDataLayoutString(Subtarget)),
InstrInfo(*this), JITInfo(*this, is64Bit), TLInfo(*this), TSInfo(*this) {
Subtarget(TT, CPU, FS, is64Bit, OL), InstrInfo(*this),
JITInfo(*this, is64Bit), TLInfo(*this), TSInfo(*this) {
initAsmInfo();
}

5
lib/Target/PowerPC/PPCTargetMachine.h
View File

@ -29,7 +29,6 @@ namespace llvm {
///
class PPCTargetMachine : public LLVMTargetMachine {
PPCSubtarget Subtarget;
const DataLayout DL; // Calculates type size & alignment
PPCInstrInfo InstrInfo;
PPCJITInfo JITInfo;
PPCTargetLowering TLInfo;
@ -56,7 +55,9 @@ public:
return &InstrInfo.getRegisterInfo();
}
const DataLayout *getDataLayout() const override { return &DL; }
const DataLayout *getDataLayout() const override {
return getSubtargetImpl()->getDataLayout();
}
const PPCSubtarget *getSubtargetImpl() const override { return &Subtarget; }
const InstrItineraryData *getInstrItineraryData() const override {
return &getSubtargetImpl()->getInstrItineraryData();