mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-07-08 18:30:04 +00:00
split the giant encoder loop into two new helper functions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119129 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner
parent
98e969ae20
commit
1620117f76
@ -61,7 +61,7 @@ void CodeEmitterGen::reverseBits(std::vector<Record*> &Insts) {
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// If the VarBitInit at position 'bit' matches the specified variable then
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// return the variable bit position. Otherwise return -1.
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int CodeEmitterGen::getVariableBit(const std::string &VarName,
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BitsInit *BI, int bit) {
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BitsInit *BI, int bit) {
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if (VarBitInit *VBI = dynamic_cast<VarBitInit*>(BI->getBit(bit)))
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if (VarInit *VI = dynamic_cast<VarInit*>(VBI->getVariable()))
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if (VI->getName() == VarName)
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@ -70,6 +70,123 @@ int CodeEmitterGen::getVariableBit(const std::string &VarName,
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return -1;
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}
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void CodeEmitterGen::
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AddCodeToMergeInOperand(Record *R, BitsInit *BI, const std::string &VarName,
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unsigned &NumberedOp,
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std::string &Case, CodeGenTarget &Target) {
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bool gotOp = false;
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CodeGenInstruction &CGI = Target.getInstruction(R);
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for (int bit = BI->getNumBits()-1; bit >= 0; ) {
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int varBit = getVariableBit(VarName, BI, bit);
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// If this bit isn't from a variable, skip it.
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if (varBit == -1) {
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--bit;
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continue;
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}
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// Figure out the consequtive range of bits covered by this operand, in
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// order to generate better encoding code.
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int beginInstBit = bit;
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int beginVarBit = varBit;
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int N = 1;
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for (--bit; bit >= 0;) {
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varBit = getVariableBit(VarName, BI, bit);
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if (varBit == -1 || varBit != (beginVarBit - N)) break;
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++N;
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--bit;
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}
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if (!gotOp) {
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// If the operand matches by name, reference according to that
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// operand number. Non-matching operands are assumed to be in
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// order.
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unsigned OpIdx;
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if (CGI.Operands.hasOperandNamed(VarName, OpIdx)) {
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// Get the machine operand number for the indicated operand.
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OpIdx = CGI.Operands[OpIdx].MIOperandNo;
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assert(!CGI.Operands.isFlatOperandNotEmitted(OpIdx) &&
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"Explicitly used operand also marked as not emitted!");
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} else {
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/// If this operand is not supposed to be emitted by the
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/// generated emitter, skip it.
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while (CGI.Operands.isFlatOperandNotEmitted(NumberedOp))
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++NumberedOp;
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OpIdx = NumberedOp++;
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}
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std::pair<unsigned, unsigned> SO =CGI.Operands.getSubOperandNumber(OpIdx);
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std::string &EncoderMethodName = CGI.Operands[SO.first].EncoderMethodName;
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// If the source operand has a custom encoder, use it. This will
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// get the encoding for all of the suboperands.
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if (!EncoderMethodName.empty()) {
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// A custom encoder has all of the information for the
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// sub-operands, if there are more than one, so only
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// query the encoder once per source operand.
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if (SO.second == 0) {
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Case += " // op: " + VarName + "\n"
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+ " op = " + EncoderMethodName + "(MI, "
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+ utostr(OpIdx);
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if (MCEmitter)
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Case += ", Fixups";
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Case += ");\n";
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}
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} else {
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Case += " // op: " + VarName + "\n" +
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" op = getMachineOpValue(MI, MI.getOperand(" +
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utostr(OpIdx) + ")";
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if (MCEmitter)
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Case += ", Fixups";
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Case += ");\n";
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}
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gotOp = true;
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}
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unsigned opMask = ~0U >> (32-N);
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int opShift = beginVarBit - N + 1;
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opMask <<= opShift;
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opShift = beginInstBit - beginVarBit;
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if (opShift > 0) {
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Case += " Value |= (op & " + utostr(opMask) + "U) << " +
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itostr(opShift) + ";\n";
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} else if (opShift < 0) {
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Case += " Value |= (op & " + utostr(opMask) + "U) >> " +
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itostr(-opShift) + ";\n";
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} else {
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Case += " Value |= op & " + utostr(opMask) + "U;\n";
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}
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}
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}
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std::string CodeEmitterGen::getInstructionCase(Record *R,
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CodeGenTarget &Target) {
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std::string Case;
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BitsInit *BI = R->getValueAsBitsInit("Inst");
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const std::vector<RecordVal> &Vals = R->getValues();
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unsigned NumberedOp = 0;
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// Loop over all of the fields in the instruction, determining which are the
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// operands to the instruction.
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for (unsigned i = 0, e = Vals.size(); i != e; ++i) {
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// Ignore fixed fields in the record, we're looking for values like:
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// bits<5> RST = { ?, ?, ?, ?, ? };
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if (Vals[i].getPrefix() || Vals[i].getValue()->isComplete())
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continue;
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AddCodeToMergeInOperand(R, BI, Vals[i].getName(), NumberedOp, Case, Target);
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}
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std::string PostEmitter = R->getValueAsString("PostEncoderMethod");
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if (!PostEmitter.empty())
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Case += " Value = " + PostEmitter + "(MI, Value);\n";
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return Case;
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}
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void CodeEmitterGen::run(raw_ostream &o) {
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CodeGenTarget Target;
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std::vector<Record*> Insts = Records.getAllDerivedDefinitions("Instruction");
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@ -107,12 +224,11 @@ void CodeEmitterGen::run(raw_ostream &o) {
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BitsInit *BI = R->getValueAsBitsInit("Inst");
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// Start by filling in fixed values...
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// Start by filling in fixed values.
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unsigned Value = 0;
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for (unsigned i = 0, e = BI->getNumBits(); i != e; ++i) {
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if (BitInit *B = dynamic_cast<BitInit*>(BI->getBit(e-i-1))) {
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if (BitInit *B = dynamic_cast<BitInit*>(BI->getBit(e-i-1)))
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Value |= B->getValue() << (e-i-1);
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}
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}
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o << " " << Value << "U," << '\t' << "// " << R->getName() << "\n";
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}
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@ -128,115 +244,9 @@ void CodeEmitterGen::run(raw_ostream &o) {
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if (R->getValueAsString("Namespace") == "TargetOpcode")
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continue;
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const std::string &InstName = R->getName();
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std::string Case("");
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std::string Case = getInstructionCase(R, Target);
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BitsInit *BI = R->getValueAsBitsInit("Inst");
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const std::vector<RecordVal> &Vals = R->getValues();
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CodeGenInstruction &CGI = Target.getInstruction(R);
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// Loop over all of the fields in the instruction, determining which are the
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// operands to the instruction.
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unsigned NumberedOp = 0;
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for (unsigned i = 0, e = Vals.size(); i != e; ++i) {
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// Ignore fixed fields.
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if (Vals[i].getPrefix() || Vals[i].getValue()->isComplete())
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continue;
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// Is the operand continuous? If so, we can just mask and OR it in
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// instead of doing it bit-by-bit, saving a lot in runtime cost.
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const std::string &VarName = Vals[i].getName();
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bool gotOp = false;
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for (int bit = BI->getNumBits()-1; bit >= 0; ) {
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int varBit = getVariableBit(VarName, BI, bit);
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// If this bit isn't from a variable, skip it.
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if (varBit == -1) {
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--bit;
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continue;
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}
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int beginInstBit = bit;
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int beginVarBit = varBit;
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int N = 1;
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for (--bit; bit >= 0;) {
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varBit = getVariableBit(VarName, BI, bit);
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if (varBit == -1 || varBit != (beginVarBit - N)) break;
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++N;
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--bit;
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}
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if (!gotOp) {
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// If the operand matches by name, reference according to that
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// operand number. Non-matching operands are assumed to be in
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// order.
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unsigned OpIdx;
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if (CGI.Operands.hasOperandNamed(VarName, OpIdx)) {
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// Get the machine operand number for the indicated operand.
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OpIdx = CGI.Operands[OpIdx].MIOperandNo;
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assert (!CGI.Operands.isFlatOperandNotEmitted(OpIdx) &&
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"Explicitly used operand also marked as not emitted!");
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} else {
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/// If this operand is not supposed to be emitted by the
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/// generated emitter, skip it.
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while (CGI.Operands.isFlatOperandNotEmitted(NumberedOp))
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++NumberedOp;
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OpIdx = NumberedOp++;
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}
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std::pair<unsigned, unsigned> SO =
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CGI.Operands.getSubOperandNumber(OpIdx);
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std::string &EncoderMethodName =
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CGI.Operands[SO.first].EncoderMethodName;
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// If the source operand has a custom encoder, use it. This will
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// get the encoding for all of the suboperands.
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if (!EncoderMethodName.empty()) {
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// A custom encoder has all of the information for the
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// sub-operands, if there are more than one, so only
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// query the encoder once per source operand.
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if (SO.second == 0) {
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Case += " // op: " + VarName + "\n"
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+ " op = " + EncoderMethodName + "(MI, "
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+ utostr(OpIdx);
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if (MCEmitter)
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Case += ", Fixups";
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Case += ");\n";
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}
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} else {
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Case += " // op: " + VarName + "\n"
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+ " op = getMachineOpValue(MI, MI.getOperand("
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+ utostr(OpIdx) + ")";
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if (MCEmitter)
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Case += ", Fixups";
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Case += ");\n";
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}
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gotOp = true;
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}
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unsigned opMask = ~0U >> (32-N);
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int opShift = beginVarBit - N + 1;
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opMask <<= opShift;
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opShift = beginInstBit - beginVarBit;
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if (opShift > 0) {
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Case += " Value |= (op & " + utostr(opMask) + "U) << "
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+ itostr(opShift) + ";\n";
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} else if (opShift < 0) {
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Case += " Value |= (op & " + utostr(opMask) + "U) >> "
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+ itostr(-opShift) + ";\n";
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} else {
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Case += " Value |= op & " + utostr(opMask) + "U;\n";
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}
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}
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}
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std::string PostEmitter = R->getValueAsString("PostEncoderMethod");
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if (!PostEmitter.empty())
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Case += " Value = " + PostEmitter + "(MI, Value);\n";
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std::vector<std::string> &InstList = CaseMap[Case];
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InstList.push_back(InstName);
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CaseMap[Case].push_back(InstName);
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}
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// Emit initial function code
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@ -23,6 +23,7 @@ namespace llvm {
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class RecordVal;
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class BitsInit;
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class CodeGenTarget;
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class CodeEmitterGen : public TableGenBackend {
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RecordKeeper &Records;
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@ -36,6 +37,12 @@ private:
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void emitGetValueBit(raw_ostream &o, const std::string &Namespace);
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void reverseBits(std::vector<Record*> &Insts);
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int getVariableBit(const std::string &VarName, BitsInit *BI, int bit);
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std::string getInstructionCase(Record *R, CodeGenTarget &Target);
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void
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AddCodeToMergeInOperand(Record *R, BitsInit *BI, const std::string &VarName,
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unsigned &NumberedOp,
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std::string &Case, CodeGenTarget &Target);
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};
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} // End llvm namespace
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