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Get rid of 3 of the 4 'printimplicit' flags. Implicit operands are now
explicitly listed in the asm string. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15397 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -115,10 +115,7 @@ namespace {
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}
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}
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void printImplUsesBefore(const TargetInstrDescriptor &Desc);
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bool printImplDefsBefore(const TargetInstrDescriptor &Desc);
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bool printImplUsesAfter(const TargetInstrDescriptor &Desc, const bool LC);
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bool printImplDefsAfter(const TargetInstrDescriptor &Desc, const bool LC);
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void printMachineInstruction(const MachineInstr *MI);
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void printOp(const MachineOperand &MO, bool elideOffsetKeyword = false);
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void printMemReference(const MachineInstr *MI, unsigned Op);
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@ -538,44 +535,6 @@ void X86AsmPrinter::printMemReference(const MachineInstr *MI, unsigned Op) {
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O << "]";
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}
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/// printImplUsesBefore - Emit the implicit-use registers for the instruction
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/// described by DESC, if its PrintImplUsesBefore flag is set.
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///
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void X86AsmPrinter::printImplUsesBefore(const TargetInstrDescriptor &Desc) {
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const MRegisterInfo &RI = *TM.getRegisterInfo();
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if (Desc.TSFlags & X86II::PrintImplUsesBefore) {
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for (const unsigned *p = Desc.ImplicitUses; *p; ++p) {
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// Bug Workaround: See note in X86AsmPrinter::doInitialization about %.
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O << "%" << RI.get(*p).Name << ", ";
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}
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}
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}
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/// printImplDefsBefore - Emit the implicit-def registers for the instruction
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/// described by DESC, if its PrintImplUsesBefore flag is set. Return true if
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/// we printed any registers.
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///
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bool X86AsmPrinter::printImplDefsBefore(const TargetInstrDescriptor &Desc) {
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bool Printed = false;
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const MRegisterInfo &RI = *TM.getRegisterInfo();
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if (Desc.TSFlags & X86II::PrintImplDefsBefore) {
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const unsigned *p = Desc.ImplicitDefs;
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if (*p) {
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O << (Printed ? ", %" : "%") << RI.get (*p).Name;
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Printed = true;
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++p;
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}
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while (*p) {
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// Bug Workaround: See note in X86AsmPrinter::doInitialization about %.
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O << ", %" << RI.get(*p).Name;
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++p;
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}
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}
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return Printed;
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}
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/// printImplUsesAfter - Emit the implicit-use registers for the instruction
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/// described by DESC, if its PrintImplUsesAfter flag is set.
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///
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@ -608,38 +567,6 @@ bool X86AsmPrinter::printImplUsesAfter(const TargetInstrDescriptor &Desc,
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return false;
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}
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/// printImplDefsAfter - Emit the implicit-definition registers for the
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/// instruction described by DESC, if its PrintImplDefsAfter flag is set.
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///
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/// Inputs:
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/// Comma - List of registers will need a leading comma.
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/// Desc - Description of the Instruction
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///
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/// Return value:
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/// true - Emitted one or more registers.
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/// false - Emitted no registers.
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///
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bool X86AsmPrinter::printImplDefsAfter(const TargetInstrDescriptor &Desc,
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const bool Comma = true) {
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const MRegisterInfo &RI = *TM.getRegisterInfo();
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if (Desc.TSFlags & X86II::PrintImplDefsAfter) {
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bool emitted = false;
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const unsigned *p = Desc.ImplicitDefs;
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if (*p) {
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O << (Comma ? ", %" : "%") << RI.get (*p).Name;
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emitted = true;
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++p;
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}
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while (*p) {
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// Bug Workaround: See note in X86AsmPrinter::doInitialization about %.
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O << ", %" << RI.get(*p).Name;
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++p;
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}
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return emitted;
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}
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return false;
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}
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/// printMachineInstruction -- Print out a single X86 LLVM instruction
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/// MI in Intel syntax to the current output stream.
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///
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@ -703,14 +630,11 @@ void X86AsmPrinter::printMachineInstruction(const MachineInstr *MI) {
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"Illegal raw instruction!");
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O << TII.getName(MI->getOpcode()) << " ";
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bool LeadingComma = printImplDefsBefore(Desc);
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bool LeadingComma = false;
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if (MI->getNumOperands() == 1) {
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if (LeadingComma) O << ", ";
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printOp(MI->getOperand(0), true); // Don't print "OFFSET"...
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LeadingComma = true;
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}
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LeadingComma = printImplDefsAfter(Desc, LeadingComma) || LeadingComma;
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printImplUsesAfter(Desc, LeadingComma);
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O << "\n";
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return;
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@ -739,8 +663,6 @@ void X86AsmPrinter::printMachineInstruction(const MachineInstr *MI) {
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O << TII.getName(MI->getOpcode()) << " ";
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printImplUsesBefore(Desc); // fcmov*
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printOp(MI->getOperand(0));
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if (MI->getNumOperands() == 2 &&
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(!MI->getOperand(1).isRegister() ||
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